3D Package Structure With Stacked Passive Components
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Solution Overview
Problem
The increasing integration of active electronic components in semiconductor packages requires more space for passive components, leading to increased costs and volume, necessitating a solution to reduce cost and volume while improving integration.
Innovation Solution
A package structure where passive components are stacked on a base board connected to a substrate via spaced-apart connection pillars, reducing the area occupied by passive components and integrating them with the chip, using thin film deposition and redistribution processes to form passive devices on the base board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If more passive components are added to accommodate increasing active electronic components integration, then the functionality and performance of the package is improved, but the occupied area and volume of the package structure increases
Solution Approach 1:
The patent transitions from a planar arrangement of passive components to a three-dimensional stacked configuration. Passive components are vertically stacked above the substrate and chip, utilizing the Z-dimension to accommodate more components without increasing the footprint area. This dimensional change enables higher component density while maintaining a compact package footprint.
Solution Approach 2:
The patent implements a nested structure where passive components are stacked vertically, with each layer positioned above the previous one. The base board carries passive components that are stacked above the substrate, creating a nested arrangement similar to dolls within dolls. This nesting approach maximizes space utilization by arranging components in vertical layers rather than spreading them out horizontally.
2Adaptability or versatility
If more passive components are added to accommodate increasing active electronic components integration, then the functionality and performance of the package is improved, but the cost of the package structure increases
Solution Approach 1:
By moving to a three-dimensional stacked architecture, the patent reduces the overall package footprint, which directly lowers material consumption for packaging materials, substrates, and housing. The vertical arrangement allows more functionality to be achieved within a smaller volume, reducing material costs and manufacturing complexity associated with larger package structures.
Solution Approach 2:
The patent combines multiple functional elements into a single integrated stacked structure. The base board, passive components, connection pillars, and substrate are merged into a unified three-dimensional assembly. This consolidation reduces the number of separate manufacturing steps, assembly operations, and associated costs compared to traditional planar packaging approaches.
3Device complexity
If passive components are arranged in a planar configuration, then the layout is simple, but the occupied area increases and integration density decreases
Solution Approach 1:
The patent resolves the contradiction between layout simplicity and integration density by introducing vertical stacking. The layout remains relatively simple in terms of the stacking sequence and component arrangement, while the integration density is dramatically improved by utilizing the vertical dimension. This approach maintains manufacturing simplicity while achieving high-density integration.
Data Source
AI summary
A package structure includes a substrate, a chip disposed on the substrate, a plurality of spaced-apart connection pillars disposed on the substrate exposed by the chip, and two ends of an extension direction of the connection pillars are a first end and a second end, respectively, the first end being connected with the substrate, and a base board located above the substrate, and a passive component is formed on a side of the base board facing the chip, the passive component being connected with the second end of the plurality of the connection pillars.