Stacked PCB Capacitor Arrays for Compact VRM Power Delivery
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Solution Overview
Problem
Existing Voltage Regulator Modules (VRMs) face challenges in providing high power and low voltage output in a small form factor due to the difficulty in incorporating substantial capacitance, which is typically achieved with large capacitor arrays that occupy significant space.
Innovation Solution
A stacked Printed Circuit Board (PCB) component array structure is implemented, where multiple PCBs are stacked with electronic components, such as capacitors, connected via solder connections and ball grid arrays, allowing for efficient integration of capacitors between the boards, reducing the overall footprint while maintaining high power and low voltage output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If traditional capacitor arrays are used to provide substantial capacitance, then the capacitance requirement is met, but the footprint size increases significantly
Solution Approach 1:
The patent transitions from a planar two-dimensional layout to a three-dimensional stacked configuration. Multiple PCB layers are stacked vertically with capacitors positioned between the layers, utilizing the vertical dimension to accommodate substantial capacitance without increasing the horizontal footprint. This dimensional change allows the VRM to meet high capacitance requirements while maintaining a compact form factor.
Solution Approach 2:
The patent implements a nested structure where capacitors are positioned between stacked PCB layers, effectively nesting components within the vertical space of the multi-layer configuration. The capacitors are embedded in the intermediate space between PCBs, similar to nested dolls, maximizing space utilization and reducing overall footprint while maintaining required capacitance.
2Area of stationary object
If VRM components are reduced to achieve small form factor, then footprint is reduced, but power delivery capability decreases
Solution Approach 1:
The patent uses vertical stacking of multiple PCB layers to increase power delivery capability without increasing horizontal footprint. The stacked configuration allows more components to be packed into the same footprint by utilizing the vertical dimension, thereby maintaining high power delivery capability in a compact form factor.
Solution Approach 2:
The patent combines multiple PCB layers into a single integrated stacked structure, merging the functionality of multiple separate components into one compact unit. This consolidation allows the VRM to achieve high power delivery capability while maintaining a small footprint by integrating capacitors, inductors, and other components into a unified stacked architecture.
3Area of stationary object
If high capacitance is integrated in compact space, then footprint is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent divides the capacitor array into multiple groups positioned on different PCB layers, with each layer handling a portion of the total capacitance requirement. This segmentation allows for modular manufacturing and assembly, reducing the complexity of integrating all capacitors into a single planar array while achieving the same compact footprint reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stacked PCB structure effectively integrates capacitors and other components, enabling high power and low voltage output in a compact form factor, addressing the space constraints of VRMs and other electronics with high capacitance requirements.
Implementation Method 1
The plurality of electronic components are electrically coupled to the first PCB by way of a first solder connections. The plurality of electronic components are electrically coupled to the second PCB by way of second solder connections.
Data Source
AI summary
A structure with an electronic component array positioned between two stacked printed circuit boards (600,606) is disclosed. The electronic components (502) of the array can be connected to the printed circuit board (600,606) by way of solder connections. Example electronic components (502) include capacitors. Related methods of manufacture are disclosed that involve applying heat to a solder paste array on a printed circuit board (600,606) to form solid conductors electrically connected to the electronic components (502).