Vertically Stacked Pixel Circuit Layout for Higher Display Resolution
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Solution Overview
Problem
Conventional display panels face a lowered pixel density and resolution due to pixel circuit designs with TFTs and capacitors arranged horizontally, increasing pixel size and reducing density.
Innovation Solution
A display panel manufacturing method that configures a 3T1C pixel circuit with transistors and capacitors arranged orthogonally on the substrate, allowing for a vertical stack of components to reduce horizontal pixel area, including forming specific layers and connections to achieve this arrangement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If TFTs and capacitors are arranged horizontally parallel to the display panel, then the pixel circuit can be formed with conventional design, but the pixel size increases and pixel density decreases
Solution Approach 1:
The patent transitions from conventional horizontal arrangement of TFTs and capacitors to a vertical stacking configuration where components are arranged in the thickness direction of the substrate. This dimensional change allows multiple pixel circuit components to occupy a smaller horizontal area while maintaining electrical connectivity through vertical interconnections, thereby increasing pixel density without compromising manufacturability.
Solution Approach 2:
The patent implements nesting by placing certain pixel circuit components within or overlapping the projection areas of other components. Specifically, the capacitor is positioned to overlap with the driver transistor region, and the switch transistor is arranged to overlap with either the driver transistor or capacitor projection. This nested arrangement maximizes space utilization and reduces the overall pixel area.
2Reliability
If more than four TFTs are used to achieve better electrical characteristics, then electrical performance improves, but pixel size further increases and resolution decreases
Solution Approach 1:
By arranging additional TFTs vertically stacked rather than horizontally extended, the patent accommodates complex pixel circuits with more than four transistors without proportionally increasing the horizontal pixel area. The vertical stacking allows multiple transistor layers to coexist within the same horizontal footprint, maintaining high resolution while achieving superior electrical characteristics.
Solution Approach 2:
The patent nests additional transistors within the projection areas of existing pixel circuit components. The switch transistor and sensing transistor are positioned to overlap with the driver transistor and capacitor regions, allowing complex circuit functionality to be integrated without proportionally increasing pixel size, thus preserving resolution while enhancing electrical performance.
Data Source
AI summary
An embodiment of the present application discloses a display panel manufacturing method and a display panel including a driver transistor, a storage capacitor, a switch transistor, and a sensing transistor vertically stacked. At leas two transistors are vertically stacked to solve a technical issue that a pixel in a conventional display panel employs a pixel circuit design of transistors and capacitors arranged along a direction parallel to the display panel to cause a lowered pixel density of the display panel to result in a lowered resolution of a display panel product.