Stacked Image Sensor Pixel Circuit Doping for Thin-Substrate FETs

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Solution Overview

Problem

In three-dimensionally structured imaging devices, the thinning of semiconductor substrates poses challenges in forming transistors effectively due to their extremely small thickness, which affects the electrical characteristics of pixel circuits.

Innovation Solution

The imaging device is configured with a stack of three substrates, where the concentration of electrically-conductive type impurities is higher on one substrate than the other, enabling appropriate formation of a well region and improving electrical characteristics by facilitating potential supply to field-effect transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the semiconductor substrate is thinned to achieve high-speed electrical coupling and size reduction, then the chip size is reduced and electrical coupling speed is improved, but the thickness becomes extremely small making it difficult to form transistors appropriately

Engineering Contradiction:
Improvechip sizeVSAvoidtransistor formation
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent applies local quality by creating a well region with higher impurity concentration in specific areas of the thinned semiconductor substrate. This localized modification allows transistors to be formed appropriately in regions where the substrate is extremely thin, while maintaining the overall thinned structure for high-speed electrical coupling and small chip size.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the impurity concentration parameter locally by forming a well region with higher impurity concentration compared to the surrounding areas. This parameter change enables appropriate transistor formation in the thinned substrate by compensating for the effects of extreme thinness in specific regions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the semiconductor substrate is thinned to enhance electrical characteristics of pixel circuits, then electrical coupling speed is improved, but the extremely small thickness affects the ability to form transistors with proper electrical characteristics

Engineering Contradiction:
Improveelectrical characteristics of pixel circuitVSAvoidtransistor formation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates a well region with higher impurity concentration in specific areas to enable appropriate transistor formation. This local quality modification ensures that transistors can be formed with proper electrical characteristics even in the thinned substrate, maintaining pixel circuit reliability while enabling the thinned structure for high-speed electrical coupling.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The well region is formed in advance during the manufacturing process, before the substrate is thinned to its final extremely small thickness. This preliminary action of creating the high impurity concentration region ensures that transistors can be properly formed after thinning, maintaining electrical characteristics without requiring post-thinning modifications.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the concentration of electrically-conductive type impurities is made higher on one substrate side, then well region formation is enabled and potential supply to field-effect transistors is improved, but the impurity concentration distribution becomes asymmetric

Engineering Contradiction:
Improvepotential supply to field-effect transistorVSAvoidimpurity concentration distribution
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent deliberately creates an asymmetric impurity concentration distribution by forming a well region with higher impurity concentration on one side of the thinned semiconductor substrate. This asymmetry is intentional and functional, enabling proper well region formation and potential supply to field-effect transistors, while the asymmetric structure itself becomes the solution to the manufacturing challenge.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability and performance of field-effect transistors in the imaging device by ensuring effective potential supply and maintaining electrical characteristics, thereby improving the overall imaging device functionality.

Implementation Method 1

a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12183756B2Imaging device
Publication Date: 2024.12.31 SONY SEMICON SOLUTIONS CORP
  • US12183756B2 patent drawing
  • US12183756B2 patent drawing
  • US12183756B2 patent drawing

AI summary

An imaging device according to an embodiment of the present disclosure includes: a first substrate including a sensor pixel that performs photoelectric conversion; a second substrate including a pixel circuit that outputs a pixel signal on a basis of electric charges outputted from the sensor pixel; and a third substrate including a processing circuit that performs signal processing on the pixel signal. The first substrate, the second substrate, and the third substrate are stacked in this order, and a concentration of electrically-conductive type impurities in a region on side of the first substrate is higher than a concentration of electrically-conductive type impurities in a region on side of the third substrate, in at least one or more semiconductor layers in which a field-effect transistor of the pixel circuit is provided.