Stacked Pixel Transistor Gate Layout for Lower Imaging Noise
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Solution Overview
Problem
Solid-state imaging devices face challenges in reducing noise in the signals outputted from pixel transistors, which affects image quality.
Innovation Solution
A solid-state imaging device is designed with a stacked structure of three substrates, including a first substrate with a photoelectric converter and electric charge accumulation section, a second substrate with a semiconductor layer and pixel transistor, and through electrodes that electrically couple the substrates, allowing the gate electrode of the pixel transistor to be in contact with the through electrode, thereby increasing the gate electrode area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode is disposed apart from the through electrode, then the structure is simpler, but the area of the gate electrode is reduced leading to increased noise
Solution Approach 1:
The gate electrode is merged with the through electrode by making them partially contact each other. This combining of structures increases the effective area of the gate electrode without adding separate components, thereby improving the signal-to-noise ratio while avoiding excessive structural complexity
Solution Approach 2:
The gate electrode extends in the thickness direction of the semiconductor layer to contact the through electrode. This three-dimensional configuration increases the gate electrode area by utilizing the vertical dimension, which improves noise characteristics without increasing the planar footprint
2Reliability
If the gate electrode area is increased by contacting the through electrode, then noise is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
The design anticipates alignment variations by creating a partial contact structure between the gate electrode and through electrode. This configuration provides a tolerance buffer that accommodates manufacturing variations while still achieving the desired electrical connection and noise reduction
Solution Approach 2:
Instead of requiring complete contact or perfect alignment, the invention uses partial contact between the gate electrode and through electrode. This partial action approach achieves sufficient electrical connection and noise reduction without demanding excessive manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise in the signal output from the pixel transistor, improving image quality by enhancing the signal-to-noise ratio.
Implementation Method 1
a through electrode that is provided in the first substrate and the second substrate, and electrically couples the first substrate and the second substrate to each other
Implementation Method 2
a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated
Data Source
AI summary
There is provided a solid-state imaging device including: a first substrate including a photoelectric converter and an electric charge accumulation section for each pixel, the electric charge accumulation section in which a signal electric charge generated in the photoelectric converter is accumulated; a second substrate including a semiconductor layer and a pixel transistor, the semiconductor layer being stacked on the first substrate, and the pixel transistor that includes a gate electrode opposed to the semiconductor layer, and reads the signal electric charge of the electric charge accumulation section; and a through electrode that is provided in the first substrate and the second substrate, and electrically couples the first substrate and the second substrate to each other and is partially in contact with the gate electrode.