Stacked Planar Terminals for Low Inductance Semiconductor Devices
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Solution Overview
Problem
Traditional semiconductor devices have high inductance due to the area between busbars and bond wire loops, which affects their efficiency in current conversion and overall system performance, such as in electric vehicles.
Innovation Solution
The semiconductor device features stacked planar terminals that abut semiconductor circuits and busbars, with an electrical insulation layer, allowing for reduced inductance and integrated busbar structure within the housing, and laser welding for assembly, which simplifies manufacturing and improves thermal and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional lead configurations are used, then manufacturing is simpler, but inductance is high which reduces efficiency
Solution Approach 1:
The patent transitions from planar/linear terminal arrangements to a three-dimensional stacked configuration. Multiple terminal layers are positioned at different vertical levels within the housing, with conductive paths extending through multiple dimensions. This spatial reconfiguration dramatically reduces the loop area for current flow, thereby reducing inductance and energy loss while maintaining manufacturing feasibility through standardized stacking processes.
Solution Approach 2:
The patent implements nested terminal structures where inner terminals are positioned within the spatial envelope of outer terminals. Multiple terminal layers are nested concentrically or in stacked arrangements, with each terminal layer containing or being contained by adjacent layers. This nesting minimizes the external dimensions while reducing current loop areas, achieving lower inductance without proportionally increasing overall device size.
2Productivity
If stacked planar terminals are used, then inductance is reduced and efficiency improved, but manufacturing complexity increases
Solution Approach 1:
The terminal structure is divided into discrete, modular terminal layers that can be manufactured separately and then assembled through stacking. Each terminal layer is an independent component with standardized interfaces, allowing for separate fabrication using conventional processes followed by precise stacking and alignment. This segmentation enables specialized manufacturing techniques for each layer while simplifying the overall assembly process through modular construction.
Solution Approach 2:
The stacked terminal structure serves multiple functions simultaneously: it provides electrical connections, acts as a current distributor, provides thermal pathways, and defines the device's external interface. The same terminal layers that conduct current also serve as mounting surfaces for semiconductor elements and as heat dissipation paths. This multi-functionality reduces the need for separate components, simplifying manufacturing despite the three-dimensional complexity.
3Loss of energy
If integrated busbar structure is used, then inductance is reduced, but manufacturing precision requirements increase
Solution Approach 1:
Terminal layers and busbar structures are pre-positioned and pre-aligned within the housing before final assembly steps. Precise alignment features such as定位 holes, recesses, and interlocking geometries are built into the terminal components during manufacturing. This preliminary positioning ensures that when layers are stacked, the conductive paths automatically align with minimal tolerance requirements, reducing inductance through precise integration while maintaining feasible manufacturing precision standards.
Solution Approach 2:
Alignment intermediaries such as insulating layers, adhesive films, or mechanical定位 structures are introduced between terminal layers to ensure precise registration. These intermediary elements provide reference surfaces and geometric constraints that guide the positioning of stacked terminals, ensuring accurate alignment of conductive paths without requiring extreme precision in the terminal components themselves. This mediates the alignment requirement, achieving low inductance through controlled positioning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces inductance, enhances electrical and thermal performance, and lowers manufacturing costs by integrating components and eliminating the need for external busbar layers, thereby improving the efficiency of semiconductor devices.
Implementation Method 1
an electrical insulation layer between the first planar terminal and the second planar terminal
Implementation Method 2
laser welding for assembly
Data Source
AI summary
A semiconductor device includes: a housing; a substrate inside the housing; first and second semiconductor circuits on the substrate; and first and second planar terminals electrically connected to the first and second semiconductor circuits, respectively, the first and second planar terminals stacked on top of each other, wherein each of the first and second planar terminals extends away from the housing.