Stacked Plate Capacitor Layout for Leakage and Breakdown Control
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Solution Overview
Problem
Semiconductor devices face challenges in achieving low current leakage and good time-dependent dielectric breakdown (TDDB) and breakdown voltage (VBD) simultaneously due to issues at the corners of conductive plates in capacitors.
Innovation Solution
A plate capacitor structure with multiple conductive plates stacked in sequence, featuring alternating large and small plates, where the sizes progressively decrease towards the top, and some corners are covered while others are exposed, ensuring balanced performance by controlling distances between adjacent plates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all corners of conductive plates are covered by subsequent plates, then time-dependent dielectric breakdown (TDDB) and breakdown voltage (VBD) are improved, but current leakage increases
Solution Approach 1:
The patent applies local quality by differentiating the treatment of corners across different plates. Specifically, corners of alternate plates are covered while corners of other plates are exposed. This local differentiation allows the structure to simultaneously achieve good TDDB/VBD (where corners are covered) and low current leakage (where corners are exposed), resolving the technical contradiction between these two performance metrics.
2Productivity
If capacitor size is reduced to increase device density, then productivity is improved, but current leakage and breakdown voltage issues worsen
Solution Approach 1:
The patent segments the capacitor structure into multiple plates with alternating corner coverage patterns. This segmentation allows the capacitor to maintain reduced size for high device density while the alternating covered/exposed corner configuration mitigates current leakage and breakdown voltage issues that typically worsen with size reduction.
Solution Approach 2:
By applying local quality through selective corner coverage on alternate plates, the patent enables small-sized capacitors to achieve reliable electrical performance. The local differentiation of corner treatment allows the structure to overcome the typical trade-off between miniaturization and electrical reliability.
3Reliability
If capacitor size is increased to improve TDDB and VBD performance, then reliability is improved, but device density decreases
Solution Approach 1:
The segmented multi-plate structure with alternating corner coverage allows the capacitor to achieve good TDDB and VBD performance without requiring increased overall size. The segmentation enables electrical performance optimization independent of physical dimension scaling.
Solution Approach 2:
The patent transitions from a single-dimensional size-scaling approach to a multi-dimensional solution by implementing alternating corner coverage patterns across stacked plates. This dimensional approach to structure optimization allows reliability improvement without sacrificing device density.
Data Source
AI summary
A method for manufacturing a semiconductor structure is provided. A first plate, a second plate, and a third plate are sequentially formed over a substrate. The first plate includes a first top surface, first sidewalls and first transition regions, wherein the first transition regions connect the first sidewalls to the first top surface. The second plate includes a second top surface, second sidewalls and second transition regions, wherein the second transition regions connect the second sidewalls to the second top surface, and the first transition regions are covered by the second plate. The third plate includes a third top surface, third sidewalls and third transition regions, wherein the third transition regions connect the third sidewalls to the third top surface, and the second transition regions are exposed by the third plate. A semiconductor structure thereof is also provided.