Stacked Switched-Capacitor Power Amplifier for High-Voltage Output
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Solution Overview
Problem
Conventional digital power amplifiers (DPAs) face limitations in output power due to low supply voltage and reliability issues with transistor stress, particularly in high-speed digital designs, which restrict their performance in applications requiring higher transmit power.
Innovation Solution
A DPA architecture that utilizes transistor stacking and a capacitive divider to enable high supply voltage levels beyond twice the maximum voltage rating, with floating gates to reduce stress on transistors and eliminate the need for additional DC-DC converters, allowing for increased output power and improved efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional SC-DPA topology is used, then power efficiency is improved, but output power is limited due to low supply voltage
Solution Approach 1:
The patent segments the voltage supply function by introducing multiple voltage sources (first voltage source providing first voltage, second voltage source providing second voltage) to different parts of the amplifier circuit. This allows the circuit to operate at higher voltages without requiring a single high-voltage source, thereby increasing output power while maintaining the efficiency benefits of the switched capacitor topology.
Solution Approach 2:
The patent changes the voltage parameter by utilizing higher supply voltages (first voltage and second voltage) compared to conventional single-voltage DPAs. This parameter change directly enables higher output power while the switched capacitor switching mechanism preserves power efficiency. The circuit operates with voltage levels that exceed twice the maximum voltage rating of individual transistors.
2Power
If high supply voltage is used to increase output power, then transistor stress increases and reliability deteriorates
Solution Approach 1:
The patent segments the voltage stress across transistors by using multiple voltage sources and a cascode configuration. Instead of applying the full high voltage across single transistors, the voltage is distributed and managed through multiple devices in series, with each transistor experiencing only a portion of the total voltage stress, thereby maintaining reliability.
Solution Approach 2:
The patent introduces intermediate voltage levels and cascode transistors as mediators between the high voltage sources and the main switching transistors. These intermediate elements control and limit the voltage stress on individual transistors, preventing excessive stress while enabling the circuit to operate at high overall voltage levels for increased output power.
3Power
If additional DC-DC converters are added to enable high voltage operation, then output power is improved, but device complexity increases
Solution Approach 1:
The patent makes the voltage sources multi-functional by having them serve both as power supply elements and as stress-control elements for the transistors. The first and second voltage sources not only provide the necessary voltage levels for high-power operation but also inherently limit transistor stress through their configuration, eliminating the need for separate DC-DC converter circuits.
Solution Approach 2:
The patent merges the voltage supply function with the transistor stress control function into a unified circuit architecture. The same voltage sources that enable high output power also protect the transistors from excessive stress through their specific configuration and the cascode structure, combining multiple functions into fewer components and reducing overall circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The architecture achieves higher output power, reduces transistor stress, improves efficiency, and lowers costs by eliminating the need for additional DC-DC converters, while maintaining reliability and reducing sensitivity to load changes.
Implementation Method 1
a pair of transistors coupled to a gate of a second one of the plurality of p-type transistors and to a second one of the plurality of n-type transistors to form a capacitive divider between (i) the pair of transistors, and (ii) the second one of the plurality of p-type transistors and the second one of the plurality of n-type transistors thereby defining a feedback capacitive ratio
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
Techniques are disclosed to allow for a switched capacitor digital power amplifier (PA) that operates using high supply voltage levels beyond twice the maximum voltage rating for any of the transistor terminals such as Vds/Vdg/Vsg.