Stacked Power Electronics Package with Embedded Cooling Channels

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Packaging power electronics components densely while maintaining effective cooling and reducing parasitic inductance, which leads to thermal management challenges and potential hot spots due to close proximity of semiconductor chips.

Innovation Solution

An electronics package design with a multi-layer structure featuring embedded power electronics components, electrically conducting layers laminated with isolation material, and an integrated cooling channel between the components to facilitate efficient heat dissipation and reduce parasitic inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If power semiconductor chips are packaged densely together to reduce parasitic inductance, then electrical performance is improved, but thermal management becomes challenging due to poor thermal spreading and hot spots

Engineering Contradiction:

Improveparasitic inductanceVSAvoidhot spot temperature

Core Design Contradiction:

Object-affected harmful factorsVSTemperature

Solution Approach 1:

The patent transitions from planar chip arrangement to three-dimensional stacked configuration, placing chips on both sides of the support layer. This vertical stacking reduces horizontal spacing and parasitic inductance while enabling independent cooling channels to access each chip's backside, effectively managing heat dissipation in the vertical dimension.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The support layer is divided into multiple segments with individual cooling channels for each chip. Each cooling channel is independently configured to remove heat from specific chips, allowing targeted thermal management. The support layer itself is segmented into electrically isolated regions that can be independently cooled.

Inventive Principle:

Principle #1Segmentation

2Temperature

If cooling channels are integrated between stacked power electronics components, then thermal resistance is reduced and cooling efficiency is improved, but device complexity increases

Engineering Contradiction:

Improvecooling efficiencyVSAvoidpackage structure complexity

Core Design Contradiction:

TemperatureVSDevice complexity

Solution Approach 1:

The support layer combines multiple functions: mechanical support for chips, electrical isolation between chips, and integration of cooling channels. The cooling channels are merged into the support layer structure itself rather than being separate components, reducing overall device complexity while maintaining effective cooling.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The support layer serves multiple purposes simultaneously: providing mechanical support, electrical isolation, thermal management pathways, and structural framework for the entire package. This multi-functionality reduces the need for separate components and simplifies the overall device architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Object-affected harmful factors

If power electronics components are arranged in multiple layers with laminated conducting layers, then parasitic inductance is reduced through short interconnections, but manufacturing precision requirements increase

Engineering Contradiction:

Improveparasitic inductanceVSAvoidalignment precision

Core Design Contradiction:

Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

Electrical conductors are pre-formed and embedded into the support layer before chip mounting. The cooling channels are also pre-configured in the support layer structure. This preliminary preparation ensures precise alignment and reduces the need for high-precision operations during final assembly, lowering manufacturing precision requirements.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design allows for high-density packaging of power electronics with efficient cooling, reducing thermal resistance and eliminating the need for external heat sinks, thereby enhancing operational efficiency and extending the lifespan of semiconductor chips.

Implementation Method 1

a cooling channel for conducting a cooling fluid through the electronics package, wherein the cooling channel runs between the at least two power electronics components through the support layer

Methodology Applied

Scientific EffectConvection: Convection

Implementation Method 2

efficient cooling, reducing thermal resistance

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10699986B2Cooled electronics package with stacked power electronics components

Publication Date: 2020.06.30 ABB (SCHWEIZ) AG

AI summary

An electronics package includes an electrically conducting support layer; at least one electrically conducting outer layer; at least two power electronics components arranged on different sides of the support layer and electrically interconnected with the support layer and with the at least one outer layer; and isolation material, in which the support layer and the at least two power electronics components are embedded, the support layer and the at least one outer layer are laminated together with the isolation material; and a cooling channel for conducting a cooling fluid through the electronics package, the cooling channel runs between the at least two power electronics components through the support layer.