Stacked Power Management Die for Multi-Voltage 3D ICs
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Solution Overview
Problem
The semiconductor industry faces challenges in managing power efficiently in three-dimensional integrated circuits (3DICs) and System on Integrated Chip (SoIC) devices, where different dies have varying power requirements, leading to inefficiencies and increased costs.
Innovation Solution
The implementation of an embedded power distribution system within the SoIC device, utilizing a power management semiconductor die that transmits appropriate voltages to each die through through-substrate vias (TSVs), enabling bi-directional communication and demand response capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional power distribution methods are used in 3DICs and SoIC devices, then device complexity is reduced, but power efficiency deteriorates due to varying power requirements of different dies
Solution Approach 1:
The patent divides the power distribution system into separate functional components: a power management die that regulates voltage and a through-substrate via system that distributes power vertically. This segmentation allows each die to receive optimized power independently, improving overall power efficiency while managing complexity through modular design
Solution Approach 2:
The power management die acts as an intermediary between the power source and individual dies, regulating and distributing appropriate voltages to each die through through-substrate vias. This intermediary component enables efficient power distribution to multiple dies with different power requirements without requiring complex external power management circuitry
2Adaptability or versatility
If through-substrate vias are used for power distribution, then power management capability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent transitions from traditional planar power distribution to three-dimensional vertical power distribution using through-substrate vias. This dimensional change allows power to be distributed efficiently to multiple stacked dies, improving power management capability while the standardized TSV fabrication process keeps manufacturing complexity manageable
3Loss of energy
If embedded power distribution system is implemented, then power savings are achieved, but device complexity increases
Solution Approach 1:
The patent merges the power management function directly into the substrate structure through embedded power distribution viae and integrated power management dies. This consolidation eliminates the need for separate external power management components, achieving power savings while managing complexity through integration rather than addition
Data Source
AI summary
A semiconductor device includes a first semiconductor die that operates at a first power, a second semiconductor die that is formed in a stack on the first semiconductor die and operates at a second power different than the first power, and a power management semiconductor die that is formed in the stack and provides the first power to the first semiconductor die through a first via and provides the second power to the second semiconductor die through a second via.