Stacked Power Module Layout for Smaller Footprint Cooling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing power conversion devices with inverters have a large footprint due to the arrangement of power semiconductor chips for the upper and lower arms near the smoothing capacitor, requiring a larger planar area.
Innovation Solution
A power module design featuring a first and second substrate with power semiconductor chips, coolers, and refrigerant flow paths that are arranged in a three-dimensional configuration, allowing the substrates to overlap in the thickness direction, reducing the planar size by utilizing a two-layer or two-story structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If power semiconductor chips for upper and lower arms are arranged in a plane near the smoothing capacitor, then the power conversion device can be assembled with conventional two-dimensional layout, but the footprint becomes larger
Solution Approach 1:
The patent transitions from conventional two-dimensional planar arrangement to three-dimensional stacked arrangement by placing the first substrate (upper arm chips) and second substrate (lower arm chips) at different heights. The first substrate is positioned above the second substrate with spacing therebetween, allowing both substrates to occupy overlapping planar areas while maintaining electrical isolation and proper cooling paths, thereby significantly reducing the overall footprint of the power conversion device.
2Area of stationary object
If substrates are arranged in three-dimensional overlapping configuration, then the planar size is reduced, but the cooling system complexity increases
Solution Approach 1:
The cooling system is segmented into separate cooling paths for the first substrate and second substrate. Each substrate has its own cooler and refrigerant flow path, allowing independent cooling optimization. The first cooler is positioned to cool the first substrate from below, while the second cooler cools the second substrate from above, with each cooling path managed separately through dedicated flow path forming parts, thus simplifying the overall cooling system design despite the three-dimensional arrangement.
3Area of stationary object
If power semiconductor chips are arranged three-dimensionally, then a smaller power module is achieved, but the temperature distribution uniformity may be affected
Solution Approach 1:
The patent implements localized cooling solutions tailored to the specific thermal characteristics of each substrate. The first cooler is specifically designed to cool the first substrate at its designated position, while the second cooler addresses the thermal needs of the second substrate. By providing dedicated cooling zones for each substrate rather than a unified cooling approach, the system maintains uniform temperature distribution across all power semiconductor chips despite their three-dimensional arrangement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables a smaller power module and conversion device by eliminating the need for increased planar dimensions, providing efficient cooling and reducing temperature variations between semiconductor chips.
Implementation Method 1
a cooler (13) for cooling the power semiconductor chip (12)... a first flow path (51) for flowing a refrigerant to the cooler (13)... a second flow path (52) for flowing a refrigerant to the cooler (23)
Implementation Method 2
forming a first flow path (51) for flowing a refrigerant to the cooler (13)... forming a second flow path (52) for flowing a refrigerant to the cooler (23)
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A smaller power module is provided. A power module 1 includes: a first substrate 10 configured to include at least one pair of conductive parts 11 not connected to each other, one or more power semiconductor chips 12 connected to any of the conductive parts 11, and the cooler 13 provided on a side where the conductive parts 11 are not provided, the cooler 13 being for cooling the power semiconductor chip 12; a second substrate 20 similarly configured to the first substrate 10; a first flow path forming part 30 provided on a surface of the first substrate 10 where the cooler 13 is provided, the first flow path forming part 30 forming a first flow path 51 together with the first substrate 10; a second flow path forming part 40 provided on a surface of the second substrate 20 where the cooler 23 is provided, the second flow path forming part 40 forming a second flow path 52 together with the second substrate 20, a surface of the first substrate 10 where the pair of conductive parts 11 are provided is opposed to and spaced apart from a surface of the second substrate 20 where the pair of conductive parts 21 are provided.