Stacked Quantum Chip Interconnects for High-Qubit Yield
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Solution Overview
Problem
As the number of qubits in a quantum computer apparatus increases, the size of the quantum chip and interposer substrate also increases, leading to issues such as wiring pattern defects, insulation layer failures, misalignment, and reduced manufacturing yields, which in turn cause signal characteristics to deteriorate.
Innovation Solution
A quantum device is designed with first and second quantum chips mounted on interposer substrates, where opposing connection terminals on the chips are electrically connected, either through capacitive or inductive coupling or solder bonding, to minimize energy loss and improve alignment accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of qubits is increased, then the computing capability is improved, but the size of the quantum chip and interposer substrate increases leading to wiring pattern defects and insulation layer failures
Solution Approach 1:
The quantum chip is divided into multiple smaller chip units, each containing a subset of qubits. These smaller chips are then mounted on an interposer substrate, which provides through vias to connect the chips vertically. This segmentation prevents the wiring pattern and insulation layer defects that occur in large single chips while maintaining a high total qubit count.
Solution Approach 2:
The patent transitions from a planar two-dimensional arrangement to a three-dimensional stacked configuration. Multiple quantum chips are arranged vertically on the interposer substrate, connecting through vias that pass through the substrate. This vertical stacking enables increased qubit density without increasing the lateral footprint, thereby avoiding the defects associated with large planar chip sizes.
2Quantity of substance
If the area of quantum chip and interposer substrate is increased, then more qubits can be accommodated, but pattern residues and short circuit defects occur during manufacturing
Solution Approach 1:
Instead of manufacturing one large chip with many qubits, the system uses multiple smaller chips that are each manufactured separately. Each smaller chip has a manageable area that avoids pattern residue defects during manufacturing. The chips are then assembled on the interposer substrate to achieve the desired total qubit count.
3Quantity of substance
If the size of quantum chip and interposer substrate is increased, then alignment accuracy of chip periphery deteriorates
Solution Approach 1:
The system divides the quantum computing platform into multiple smaller chips rather than one large chip. Each smaller chip maintains good alignment accuracy at its periphery. The interposer substrate with through vias enables precise vertical alignment and connection between these smaller chips, achieving high overall precision that would be impossible with a single large chip.
4Quantity of substance
If the number of connection terminals is increased, then more qubits can be connected, but mount load increases resulting in height accuracy and positional variation
Solution Approach 1:
The connection terminals are distributed across multiple smaller chips rather than concentrated on one large chip. Each chip has a manageable number of terminals, reducing the mount load on individual connection points. The through vias in the interposer substrate provide robust vertical connections that maintain height accuracy despite the increased total number of terminals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces yield loss and connection inaccuracies, maintaining signal quality by minimizing energy loss and improving alignment, thus enhancing the performance of quantum computing apparatus.
Implementation Method 1
the mutually opposing connection terminals of the first quantum chip and the second quantum chip are electrically connected to each other
Implementation Method 2
either through capacitive or inductive coupling or solder bonding
Data Source
AI summary
A quantum device includes a first quantum chip, a second quantum chip, and one or more interposer substrates mounting the first quantum chip and the second quantum chip. The first quantum chip and the second quantum chip mounted on a same or different interposer substrates, have surfaces with at least partial regions thereof opposing each other, and electrical connection is made between opposing connection terminals arranged in at least partial regions of the surfaces, opposed to each other, of the first quantum chip and the second quantum chip.