Stacked Quantum Processor Layout for Larger Qubit Control Footprint

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Solution Overview

Problem

The design of large-scale quantum processors faces challenges in increasing the number of high-quality qubits and corresponding control elements, which are necessary for effective quantum computing, as existing qubit arrays often lead to increased interference and reduced quality due to the proximity of control elements to qubits.

Innovation Solution

A quantum processor design featuring a qubit array with directly coupled qubits on one chip and control elements on a separate chip, where the qubits are arranged to increase the control footprint area by separating superconductor islands and increasing the distance between adjacent qubits, reducing interference and enhancing qubit quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If control elements are placed close to qubits to reduce footprint area, then device area is reduced, but qubit quality deteriorates due to increased interference

Engineering Contradiction:
Improvecontrol footprint areaVSAvoidqubit quality
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The system is divided into two separate chips: a first chip containing the qubit array and a second chip containing the control elements. This spatial segmentation allows qubits and control elements to be physically separated, reducing electromagnetic interference while maintaining functional connectivity through bonding interfaces between the chips.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control elements are positioned on a second chip that is bonded to the first chip, effectively moving the control footprint from the same two-dimensional plane as the qubits to a different layer or dimension. This vertical stacking approach increases the effective control footprint area while reducing in-plane interference.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If qubits are placed close together to increase qubit density, then productivity is improved, but qubit quality deteriorates due to increased interference

Engineering Contradiction:
Improvequbit densityVSAvoidqubit quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By separating qubits and control elements onto different chips, the system achieves high qubit density on the first chip without the interfering presence of control elements, thereby maintaining both high density and high quality simultaneously.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If control elements are integrated on the same chip as qubits to reduce device complexity, then device complexity is reduced, but qubit quality deteriorates due to interference

Engineering Contradiction:
Improvechip integrationVSAvoidqubit quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system segments control elements and qubits onto separate chips, which increases structural complexity but eliminates interference. The bonding interface between chips provides a standardized connection method that manages the complexity of the segmented architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Control elements are extracted from the qubit chip and placed on a separate control chip. This extraction removes the source of interference from the qubit environment while maintaining all necessary control functions through the bonding interface.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design allows for an increased number of qubits while improving their quality by reducing control element interference and providing additional space for new control elements, thus enabling fault-tolerant quantum computations.

Implementation Method 1

each qubit of the qubit array includes at least two superconductor islands

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

For each qubit, a first superconductor island of the qubit is coupled to a second superconductor island by a Josephson junction

Methodology Applied
Scientific EffectJosephson effect: Josephson Effect

Implementation Method 3

each qubit of the multiple qubits that define the enclosed region is arranged to directly electromagnetically couple to an adjacent qubit of the multiple qubits that define the enclosed region

Methodology Applied
Scientific EffectElectromagnetic coupling: Electromagnetic Induction

Implementation Method 4

each qubit may be coupled capacitively to the adjacent qubit. A degree of capacitive coupling may be determined substantially by a space separating the qubit from an adjacent qubit

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS11991934B1Quantum processor design to increase control footprint
Publication Date: 2024.05.21 GOOGLE LLC
  • US11991934B1 patent drawing
  • US11991934B1 patent drawing
  • US11991934B1 patent drawing

AI summary

A quantum processor includes: a first chip comprising a qubit array, in which a plurality of qubits within the qubit array define an enclosed region on the first chip, in which each qubit of the plurality of qubits that define the enclosed region is arranged to directly electromagnetically couple to an adjacent qubit of the plurality of qubits that define the enclosed region, and in which each qubit of the qubit array comprises at least two superconductor islands, and a second chip bonded to the first chip, the second chip including one or more qubit control elements, in which the qubit control elements are positioned directly over the enclosed region of the first chip.