Stacked Superconducting Qubit Layout for Low-Decoherence Control
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Solution Overview
Problem
Current quantum computing technologies face challenges in increasing superconducting qubit density and reducing decoherence due to interactions with lossy materials and control wiring, which limits the complexity and efficiency of quantum processing.
Innovation Solution
The solution involves a stacked quantum computing device architecture where high-quality superconducting qubits are isolated on one chip, and lossy materials and control wiring are placed on a separate chip, with a shielding layer to minimize interference, allowing for 3D integration and relaxed layout constraints while maintaining coherence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If superconducting qubits are integrated with control wiring and readout elements on the same chip, then device complexity is reduced, but qubit coherence is degraded due to interactions with lossy materials and control wiring
Solution Approach 1:
The quantum computing device is divided into two separate chips: a first chip containing the superconducting qubits and a second chip containing the control wiring and readout elements. This segmentation isolates the qubits from lossy materials and control wiring, reducing decoherence while maintaining functional integration through chip-to-chip coupling.
Solution Approach 2:
A dielectric layer is introduced as an intermediary between the control wiring on the second chip and the superconducting qubits on the first chip. This dielectric layer acts as a mediator that enables controlled interaction while minimizing harmful coupling, allowing the system to benefit from both separation and functional connection.
2Productivity
If qubit density is increased on a single chip, then productivity is improved, but qubit coherence is degraded due to increased interactions with lossy materials
Solution Approach 1:
The invention transitions from a two-dimensional planar integration to three-dimensional stacked architecture. By placing qubits on one chip and control elements on another chip in the vertical dimension, the system achieves higher effective qubit density while maintaining low interaction with lossy materials through the shielding dielectric layer.
3Ease of operation
If control wiring is placed close to superconducting qubits, then ease of operation is improved, but energy loss increases due to interactions with lossy materials
Solution Approach 1:
The control wiring and readout elements are extracted from the qubit chip and placed on a separate second chip. This extraction removes the source of energy loss from proximity to the qubits while preserving control functionality through the dielectric-mediated coupling and chip-to-chip interconnections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances qubit density, reduces decoherence, and improves the quality factors of both qubits and readout elements, enabling more complex quantum computations with reduced energy loss and improved coherence.
Implementation Method 1
a first chip that includes a first dielectric substrate and a superconducting qubit on the first dielectric substrate
Implementation Method 2
a shielding layer covering the dielectric layer
Data Source
AI summary
A stacked quantum computing device including a first chip that includes a first dielectric substrate and a superconducting qubit on the first dielectric substrate, and a second chip that is bonded to the first chip and includes a second dielectric substrate, a qubit readout element on the second dielectric substrate, a control wire on the second dielectric substrate, a dielectric layer covering the control wire, and a shielding layer covering the dielectric layer.