Stacked RF Circuit Topology With Integrated Interconnects
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Solution Overview
Problem
Conventional RF power amplifier designs face challenges in assembling and optimizing components due to increased connection lengths affecting impedance matching and harmonic termination, leading to reduced performance and instability, particularly at higher frequencies.
Innovation Solution
Implementing integrated interconnect structures, such as conductive wiring patterns or passive devices, to connect active transistor dies without wire bonds, reducing parasitic induction and manufacturing issues, and optimizing the placement of passive components to minimize capacitive coupling and enhance quality factor Q.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonds are used to connect active transistor dies, then electrical connections can be established, but parasitic induction increases and manufacturing complexity increases
Solution Approach 1:
The patent removes wire bonds from the system entirely, extracting the problematic interconnection method. Instead of using wire bonds to connect transistor dies, the invention uses direct die-to-substrate bonding with integrated interconnect structures that route signals through the substrate, eliminating parasitic induction and manufacturing complexity associated with wire bonding.
Solution Approach 2:
The patent merges the interconnect function into the substrate itself. The substrate is designed with integrated conductive paths that simultaneously provide mechanical support and electrical interconnection, combining multiple functions into a single structure and eliminating the need for separate wire bond interconnects.
2Ease of manufacture
If connection lengths are increased to accommodate component placement, then all components can be connected, but impedance matching deteriorates and harmonic termination is affected
Solution Approach 1:
The patent transitions from planar component placement to three-dimensional stacked architecture. Multiple transistor dies and passive components are vertically stacked and interconnected through the substrate, allowing compact integration while maintaining short signal paths. This vertical dimension enables dense packaging without increasing connection lengths.
Solution Approach 2:
The substrate acts as an intermediary that provides integrated interconnect structures with optimized impedance characteristics. These substrate-based interconnects serve as matched impedance transmission lines that maintain signal integrity and enable proper harmonic termination while accommodating component placement requirements.
3Area of stationary object
If passive components are placed closer to reduce size, then device footprint decreases, but capacitive coupling increases and quality factor Q decreases
Solution Approach 1:
The patent applies different dielectric materials with appropriate loss tangents in different regions of the substrate. Areas with passive components use low-loss dielectric materials to minimize capacitive coupling and maintain high quality factors, while other regions may use different materials optimized for their specific functions. This localized material optimization enables compact packaging without sacrificing performance.
Data Source
AI summary
An integrated circuit device package includes a substrate, a first die comprising active electronic components attached to the substrate, and package leads configured to conduct electrical signals between the first die and an external device. At least one integrated interconnect structure is provided on the first die opposite the substrate. The at least one integrated interconnect structure extends from the first die to an adjacent die attached to the substrate and/or to at least one of the package leads, and provides electrical connection therebetween. Related devices and power amplifier circuits are also discussed.