CMOS MOSFET-Stacked RF Power Amplifier With Shared Voltage Handling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
RF power amplifiers face challenges in achieving high power efficiency, linearity, integration, and output power while maintaining low manufacturing costs, due to limitations in transistor design, nonlinear characteristics, and the need for high-voltage transistors and additional compensating components.
Innovation Solution
The implementation of a main amplification circuit using two PMOS and two NMOS amplification modules with common-source-common-gate structures, connected in series and sharing bias voltages, which form a double push-pull architecture to improve power efficiency and linearity, and eliminate the need for a VSWR protection circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-voltage transistors M3 and M4 are stacked on top of core transistors M1 and M2 to share voltage drop, then transistor safety is improved, but power efficiency deteriorates due to larger capacitive parasitic parameters and smaller transconductance gain
Solution Approach 1:
The voltage sharing function is segmented from the core transistors M1 and M2 to dedicated voltage-sharing transistors M3 and M4. This segmentation allows core transistors to operate at optimal low voltage while voltage-sharing transistors handle the excess voltage, resolving the contradiction between transistor safety and power efficiency.
Solution Approach 2:
Instead of having core transistors directly handle high voltage, the patent inverts the approach by placing voltage-sharing transistors in series with core transistors. The voltage-sharing transistors are specifically designed to withstand high voltage, while core transistors operate at low voltage, thus improving both safety and efficiency.
2Reliability
If transistors M5 and M6 are added to compensate for nonlinearity of M1 and M2, then linearity is improved, but power efficiency deteriorates due to increased capacitive load
Solution Approach 1:
The voltage-sharing transistors M3 and M4 are designed to perform dual functions: voltage sharing and nonlinearity compensation. By merging these two functions into a single transistor pair, the patent eliminates the need for separate compensation transistors M5 and M6, thus improving power efficiency while maintaining linearity.
Solution Approach 2:
The voltage-sharing transistors M3 and M4 are designed with multi-functionality, serving both as voltage-sharing elements and as nonlinearity compensation elements. This universal design reduces the total transistor count and capacitive load, resolving the contradiction between linearity and power efficiency.
3Power
If supply voltage Vdd is increased to obtain large output power, then output power is improved, but transistor reliability deteriorates due to operation above rated voltage
Solution Approach 1:
The voltage handling responsibility is segmented between core transistors M1 and M2 (low voltage) and voltage-sharing transistors M3 and M4 (high voltage). This segmentation allows the supply voltage to be increased for high output power while core transistors remain within their rated voltage limits, ensuring reliability.
Solution Approach 2:
Voltage-sharing transistors M3 and M4 act as intermediary elements between the high supply voltage and the low-voltage core transistors. These intermediary transistors protect the core transistors from high voltage stress while enabling high output power operation.
4Reliability
If multiple transistor stacks are used to achieve high output power and linearity, then performance is improved, but device complexity increases
Solution Approach 1:
The patent merges the voltage-sharing function and nonlinearity compensation function into the same transistor pair M3 and M4. This merging reduces the total transistor count from six (M1-M6) to four (M1-M4), simplifying the circuit while maintaining high performance.
Solution Approach 2:
The voltage-sharing transistors M3 and M4 are designed with multi-functionality, serving both as voltage-sharing elements and as nonlinearity compensation elements. This universal design reduces device complexity while achieving high output power and linearity.
Data Source
Figure 1~3
Figure 4
Figure 5
AI summary
An amplification circuit for RF power amplifiers is provided. The circuit includes two PMOS amplification modules and two NMOS amplification modules; each module includes a CSCG structure composed of a stack of K transistors. The first PMOS module and the first NMOS module are connected in series between a supply voltage and ground; gates of main amplification transistors of the first PMOS module and the first NMOS module are connected to a non-inverting input, and outputs of the first PMOS module and the first NMOS module are connected together to form an inverting output. The second PMOS module and the second NMOS module are similarly connected. Both the first and the second modules will be connected side-by-side as a pseudo differential structure to provide double push-pull function to the load. The present disclosure simultaneously achieves high power efficiency, and high linearity.