Stacked RF Switch Back-Gate Capacitors for Soft Compression Control
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Solution Overview
Problem
In RF switches with stacked FETs, increasing the number of transistors to improve RF voltage handling leads to increased parasitic capacitance to the semiconductor substrate, causing undesirable modulations in on resistance (Ron) and soft compression.
Innovation Solution
Incorporating secondary gate-connected compensation capacitors, such as APMOM capacitors, to each transistor in the RF switch circuit, which are preselected to have different capacitances, compensating for parasitic capacitance between secondary gates and the semiconductor substrate, thereby limiting Ron modulations and soft compression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the number of stacked FETs is increased to improve RF voltage handling, then RF voltage handling capability is improved, but parasitic capacitance to the semiconductor substrate increases causing Ron modulation and soft compression
Solution Approach 1:
An insulator layer is introduced as an intermediary between the semiconductor substrate and the secondary gates of the FETs. This insulator layer physically separates the secondary gates from the substrate, thereby reducing the parasitic capacitance formed between them while allowing the stacked FET configuration to maintain its RF voltage handling capability
Solution Approach 2:
The structure segments the interaction between the secondary gates and the substrate by introducing the insulator layer, effectively dividing the capacitance path. This segmentation reduces the direct capacitive coupling between the secondary gates and the substrate, mitigating the harmful parasitic effects while preserving the desired RF performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for increasing the number of transistors in the RF switch without significant increases in Ron modulation or soft compression, enhancing RF voltage handling and performance.
Implementation Method 1
Incorporating secondary gate-connected compensation capacitors, such as APMOM capacitors, to each transistor in the RF switch circuit, which are preselected to have different capacitances, compensating for parasitic capacitance between secondary gates and the semiconductor substrate
Data Source
AI summary
A disclosed structure (e.g., a switch circuit) includes multiple transistors (e.g., on triple wells) connected in series between a first and second nodes. Each transistor can include a primary gate (e.g., a front gate) for controlling the ON/OFF state of the transistor and a secondary gate (e.g., a back gate) for adjusting the VT of the transistor. The switch circuit further includes multiple capacitors (e.g., APMOM capacitors on triple wells), each connected to the second node and to the secondary gate of a corresponding one of the transistors. In advanced semiconductor-on-insulator processing technology platforms, each secondary gate includes a well region within a semiconductor substrate and a corresponding section of an insulator layer, which is on the semiconductor substrate and adjacent to an active device region for the transistor. The capacitors are preselected during design and different capacitances for limiting parasitic secondary gate-to-substrate coupling. Also disclosed are associated methods.