Stacked RF Amplifier Topology With Through-Die Vias to Cut Inductance
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Solution Overview
Problem
Conventional RF power amplifier devices face challenges in high-frequency applications due to excessive inductance from bond wires, which can lead to manufacturing costs and device failure issues, and performance degradation from proximity to ground planes, necessitating the development of alternative interconnect methods.
Innovation Solution
The implementation of integrated interconnect structures, including conductive via structures and passive devices like IPDs, which provide impedance matching and harmonic termination without wire bonds, allowing for stacked topologies and reduced parasitic induction, thereby minimizing inductance and capacitive coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bond wires are used for interconnect, then electrical connection is achieved, but inductance increases and RF performance degrades
Solution Approach 1:
The patent extracts and eliminates the bond wire interconnect from the RF amplifier structure, replacing it with direct die-to-substrate bonding. This removes the source of parasitic inductance while maintaining electrical connection functionality through alternative pathways.
Solution Approach 2:
The patent transitions from planar interconnect (bond wires on surface) to vertical interconnect (through-silicon carbide vias penetrating the die thickness). This dimensional change enables direct electrical pathways that bypass the parasitic inductance associated with surface-mounted bond wires.
2Reliability
If bond wires are used for interconnect, then electrical connection is achieved, but manufacturing costs increase
Solution Approach 1:
The patent removes the bond wire component and associated wire-bonding manufacturing process, replacing them with direct die bonding techniques that eliminate material costs and complex assembly steps while maintaining device functionality.
Solution Approach 2:
The patent combines the interconnect function with the die-substrate bonding process itself, eliminating the need for separate wire-bonding steps. The electrical connection is achieved as an integrated part of the mounting process rather than as a separate manufacturing operation.
3Reliability
If bond wires are used for interconnect, then electrical connection is achieved, but assembly time increases
Solution Approach 1:
The patent merges the electrical interconnect function with the die mounting process, achieving both mechanical attachment and electrical connection in a single bonding operation. This eliminates the sequential steps of mounting followed by wire-bonding, thereby reducing total assembly time.
Solution Approach 2:
The patent incorporates interconnect pathways directly into the die and substrate structures before final assembly. The through-silicon carbide vias and contact pads are pre-formed during fabrication, so no additional interconnect formation is needed during the assembly process.
4Reliability
If passive components are placed near ground plane, then impedance matching is achieved, but capacitive coupling increases and quality factor decreases
Solution Approach 1:
The patent moves passive components from the planar domain near the ground plane to the vertical dimension by stacking them on top of the RF amplifier die. This spatial separation in the third dimension reduces parasitic capacitive coupling to the ground plane while maintaining impedance matching functionality.
Solution Approach 2:
The patent introduces the RF amplifier die itself as an intermediary substrate between the passive components and the ground plane. This intermediate layer provides electrical isolation and reduces direct capacitive coupling pathways while allowing impedance matching circuits to function effectively.
Data Source
AI summary
A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.