Stacked Semiconductor Bonding Layout for Flat Wafer-Diced Surfaces
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Solution Overview
Problem
The reliability of bonding in semiconductor devices is compromised due to the imperfections in the flatness of the bonded surface, particularly when cutting wafers into semiconductor components, which can lead to steps and chipping, affecting the bonding strength and overall reliability.
Innovation Solution
The semiconductor device employs a stacked structure where the first and second semiconductor components are bonded on a bonded surface with a specific contour, formed by etching and dicing processes, ensuring a high degree of flatness and alignment, thereby enhancing the bonding strength and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If wafers are cut into semiconductor components, then productivity is improved, but the flatness of the bonded surface deteriorates due to steps and chipping
Solution Approach 1:
The patent applies preliminary action by forming a protective film on the bonded surface before the dicing process. This protective film prevents steps and chipping from occurring during cutting, thereby maintaining surface flatness while enabling high-volume production through wafer-level processing.
Solution Approach 2:
The protective film acts as a cushioning layer that absorbs mechanical stress during the dicing process. By placing this protective layer beforehand, the patent prevents damage to the bonded surface that would otherwise occur during cutting, resolving the contradiction between productivity gains from dicing and the loss of surface flatness.
2Strength
If conductor portions and insulation films are bonded together, then bonding strength is improved, but reliability deteriorates due to surface imperfections
Solution Approach 1:
The patent replaces the mechanical bonding approach (direct contact between conductor portions and insulation films) with a chemical bonding mechanism. By introducing a protective film that enables chemical bonding through silane-based reactions, the patent achieves both strong bonding and high reliability even in the presence of surface imperfections.
Solution Approach 2:
The patent changes the bonding parameters by introducing a protective film that modifies the bonding interface. This film enables bonding under milder conditions and creates a more reliable bond that is less sensitive to surface flatness variations, thereby resolving the contradiction between bonding strength and reliability.
3Productivity
If dicing is performed after bonding, then productivity is improved, but manufacturing precision deteriorates due to steps and chipping on the bonded surface
Solution Approach 1:
The protective film is formed on the bonded surface before dicing to prevent steps and chipping during the cutting process. This preliminary protective action enables high-volume production while maintaining surface quality.
Solution Approach 2:
The patent replaces direct mechanical contact during dicing with a protected interface. The protective film acts as a buffer that prevents mechanical damage during cutting, allowing productivity improvement through dicing without sacrificing manufacturing precision.
Data Source
Figure 1A~1B
Figure 2
Figure 3A~3C
AI summary
A semiconductor device includes a first semiconductor component including a first semiconductor substrate and a first wiring structure, and a second semiconductor component including a second semiconductor substrate and a second wiring structure. A first surface of the first semiconductor component and a second surface of the second semiconductor component are bonded together. Assuming that regions having circumferences respectively corresponding to shapes obtained by vertically projecting the first surface, the second surface, the first wiring structure, and the second wiring structure on a virtual plane are first to fourth regions, respectively, an area of the first region is smaller than an area of the second region, the entire circumference of the first region is included in the second region, an area of the fourth region is smaller than an area of the third region, and the entire circumference of the fourth region is included in the third region.