Stacked Semiconductor Package with Cavity and Through Electrodes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
There is a need for a semiconductor package that enhances structural and electrical characteristics to meet the requirements of smaller, lighter, and multifunctional electronic products, particularly in System-In-Package (SIP) configurations where multiple semiconductor devices are stacked.
Innovation Solution
The semiconductor package includes a first semiconductor device mounted on a package substrate with a cavity, a second device on the active surface electrically connected to the first, and a third device in the cavity electrically connected to the first through through electrodes or micro bumps, allowing for efficient internal and external data transfer and improved mechanical durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If multiple semiconductor devices are stacked in a single package to reduce size, then the area and volume of the electronic product are reduced, but the structural complexity and manufacturing difficulty increase
Solution Approach 1:
The patent implements a stacked package structure where multiple semiconductor devices are vertically arranged and nested within a single package body. The first semiconductor device is positioned at a first location, the second semiconductor device at a second location, and the third semiconductor device at a third location, creating a nested three-dimensional configuration that reduces the horizontal area while maintaining functional independence of each device.
Solution Approach 2:
The patent transitions from a traditional two-dimensional planar arrangement of semiconductor devices to a three-dimensional stacked configuration. By utilizing the vertical dimension (z-axis) to position multiple devices at different heights within the package, the design achieves higher integration density without increasing the package footprint, effectively solving the area reduction requirement.
2Speed
If through electrodes with fine pitches are used to increase data-transfer rates, then the electrical performance and data-transfer speed are improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent employs through electrodes with fine pitches as a key parameter change to enhance data-transfer rates. By reducing the pitch (spacing) between adjacent through electrodes, the electrical connection density increases, enabling faster data transfer between stacked semiconductor devices. This parameter optimization directly addresses the speed improvement requirement while accepting tighter manufacturing tolerances.
3Adaptability or versatility
If multiple semiconductor devices are integrated in a single package to create multifunctional systems, then the functionality and system integration are improved, but the device complexity and electrical connection requirements increase
Solution Approach 1:
The patent creates a multi-functional system by integrating three different semiconductor devices (first, second, and third devices) within a single package. Each device can perform different functions, and their combined operation enables complex system-level functionalities that would require multiple separate packages. This universal approach allows a single package to serve multiple purposes and implement diverse functions.
Solution Approach 2:
The patent uses through electrodes as intermediary elements to facilitate electrical connections between the stacked semiconductor devices. These through electrodes act as mediators that transmit electrical signals and power between devices at different vertical levels, simplifying the overall connection architecture by providing standardized interconnection points rather than requiring direct device-to-device bonding.
Data Source
AI summary
A semiconductor package that includes a first semiconductor device mounted on a package substrate and includes an inactive surface having a cavity and an active surface opposite to the inactive surface, a second semiconductor device that is disposed on the active surface and electrically connected to the first semiconductor device, and a third semiconductor device that is disposed on the inactive surface in the cavity and electrically connected to the first semiconductor device. The first semiconductor device includes at least one first through electrode electrically connecting the first semiconductor device to the third semiconductor device through the first semiconductor device.


