Stacked Semiconductor Chips With Through-Chip Vias
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Solution Overview
Problem
Current semiconductor memory apparatuses require re-development of memory and peripheral blocks when purposes, intended uses, or specifications change, leading to inefficiencies in area usage and increased development time and cost.
Innovation Solution
A semiconductor apparatus comprising a memory block chip, a signal input/output chip, a main control chip, and a voltage generating chip, fabricated independently, which can be stacked and controlled selectively according to specifications using through-chip vias and transmission lines to manage data access, signal processing, and voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a plurality of semiconductor chips are stacked two-dimensionally or three-dimensionally into a package to increase storage capacity, then the storage capacity is improved, but the area efficiency is reduced due to the need to re-develop memory and peripheral blocks when specifications change
Solution Approach 1:
The semiconductor apparatus is divided into multiple independent chips stacked in three dimensions: memory chips containing memory blocks, and a separate peripheral circuit chip containing control logic and I/O interfaces. This segmentation allows each chip to be optimized and manufactured independently, improving area efficiency while maintaining high storage capacity through vertical stacking.
2Area of moving object
If memory block and peripheral circuit block are divided and stacked on separate chips, then area efficiency is improved, but development time and cost increase when specifications change requiring re-development
Solution Approach 1:
The peripheral circuit chip is designed as a universal interface unit that can work with different memory chip specifications. The control logic and I/O interfaces on the peripheral chip are configured to accommodate various memory capacities and organizations, allowing the same peripheral chip design to support multiple memory specifications without re-development.
3Area of moving object
If separate chips are used for memory and peripheral circuits, then area efficiency is improved, but device complexity increases due to multiple independent components
Solution Approach 1:
While the memory and peripheral circuits are physically separated onto different chips to improve area efficiency, the patent merges their functionality through standardized inter-chip interfaces. The peripheral circuit chip consolidates control logic, address decoding, and I/O interfaces that work together as an integrated unit, simplifying the overall system architecture despite the physical separation.
Data Source
AI summary
Various embodiments of a semiconductor apparatus are disclosed. In one exemplary embodiment, a semiconductor apparatus may include a memory block chip and a signal input/output chip. The memory block chip is configured to control a data access size according to specifications. The signal input/output chip is configured to transmit input data from an external device to the memory block chip or transmit output data from the memory block chip to an external device and process the input data or the output data by selectively enabling a clock phase control unit and a signal processing unit according to the specifications.