Stacked Semiconductor Chips Warpage Management

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Solution Overview

Problem

Existing semiconductor device manufacturing techniques face challenges in maintaining reliable junctions between stacked semiconductor chips due to warpage issues, particularly when thicker chips are stacked on top of thinner ones, which can lead to breakage of microbumps and increased mechanical stress.

Innovation Solution

A semiconductor device configuration where the first semiconductor chip is made thinner than the subsequent chips, with an organic protective film and adhesive resin used to manage warpage, and microbumps and through-vias for electrical connectivity, ensuring the adhesive resin can expand without breaking the connections between layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a thicker semiconductor chip is stacked on top of a thinner chip, then the structural support is improved, but warpage-induced stress increases and microbump breakage occurs

Engineering Contradiction:
Improvestructural supportVSAvoidjunction reliability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent applies asymmetry by intentionally creating a thickness difference between the lowermost chip and upper chips, where the lowermost chip is made thinner than the upper chips. This asymmetric configuration allows the adhesive resin to expand into the gap without causing warpage-induced stress that would lead to microbump breakage, while still maintaining structural support through the stacked arrangement.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements beforehand cushioning by providing an adhesive resin layer between the lowermost thinner chip and the upper thicker chips. This adhesive resin acts as a cushioning element that absorbs and distributes the mechanical stress caused by thermal expansion and contraction, preventing stress concentration at the microbump junctions and reducing the risk of breakage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Reliability

If adhesive resin is provided between chips to manage warpage, then warpage-induced stress is reduced, but the device complexity increases

Engineering Contradiction:
Improvewarpage managementVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The adhesive resin layer serves multiple functions simultaneously: it bonds the stacked chips together, manages warpage by absorbing expansion stress, and fills the gap created by the thickness difference between chips. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity while achieving reliable warpage management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If microbumps are used for electrical connectivity, then the connection density is improved, but susceptibility to warpage-induced breakage increases

Engineering Contradiction:
Improveconnection densityVSAvoidmicrobump reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The adhesive resin layer is positioned beforehand between the chips to cushion and absorb the mechanical stress generated by thermal expansion and contraction. This protective cushioning effect shields the microbumps from warpage-induced forces, allowing high connection density to be achieved without proportionally increasing the risk of microbump breakage.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability of junctions between semiconductor chips by minimizing warpage-induced stress and preventing microbump breakage, allowing for reduced pressure on larger bumps and improved mechanical stability of the stacked structure.

Implementation Method 1

an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

At least one of the first and second semiconductor chips has an organic protective film disposed thereon

Methodology Applied
Scientific EffectStress distribution:

Implementation Method 3

a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10943844B2Semiconductor device including multiple chips
Publication Date: 2021.03.09 KIOXIA CORP
  • US10943844B2 patent drawing
  • US10943844B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor chip, a second semiconductor chip thicker than the first semiconductor chip, a plurality of bumps provided between the first and second semiconductor chips and electrically connecting the first and second semiconductor chips, an adhesive resin provided between the first and second semiconductor chips and bonding the first and second semiconductor chips, and a sealing resin encapsulating the first and second semiconductor chips. At least one of the first and second semiconductor chips has an organic protective film disposed thereon.