Stacked Semiconductor Device Connection Structures

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Solution Overview

Problem

In semiconductor device stacking, existing technologies face challenges in stabilizing connections between stacked chips, particularly due to thermal or physical stress that can lead to failure in previous connection structures, necessitating a method to reduce the bonding force in subsequent connections without modifying pre-formed structures.

Innovation Solution

The solution involves forming connection structures with a varying number or area of connection elements and auxiliary elements between semiconductor chips, where the number or area of subsequent connection structures is less than those of previous structures, applying a reduced bonding force to prevent modification of pre-formed connections, and using a process that applies heat and pressure to secure the chip stack on a substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of connection structures is reduced in subsequent stacking layers, then the bonding force is reduced and pre-formed connection structures are protected from modification, but the electrical connection capacity and structural stability may be compromised

Engineering Contradiction:
Improvestability of connection structuresVSAvoidnumber of connection structures
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The connection structures are segmented into different types: connection elements (conductive bumps) that provide electrical connection and auxiliary elements (non-conductive protrusions) that provide structural support and alignment. This segmentation allows the conductive elements to be reduced in number while maintaining connection stability through the auxiliary elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the connection structure have different properties: connection elements have high electrical conductivity for signal transmission, while auxiliary elements have mechanical strength for structural support. This local differentiation allows optimization of each element's function while reducing the total number of conductive connection structures needed.

Inventive Principle:
Principle #3Local quality

2Strength

If bonding force is applied to secure chip stack, then subsequent connection structures are formed, but pre-formed connection structures may be modified or damaged due to thermal or physical stress

Engineering Contradiction:
Improvebonding strength of connection structuresVSAvoidintegrity of pre-formed connection structures
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The auxiliary elements are designed to absorb and distribute the bonding force applied during subsequent stacking layers. These non-conductive protrusions act as cushioning elements that protect the delicate conductive connection structures from excessive stress and thermal damage during the bonding process.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The auxiliary elements serve as intermediary structures between the bonding process and the sensitive connection elements. They mediate the bonding force application, allowing secure bonding while protecting the electrical connection structures from direct exposure to high stress and temperature.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the area of connection structures is reduced in upper layers, then the contact area for bonding is reduced and bonding force is distributed, but the electrical connection capacity may be limited

Engineering Contradiction:
Improvebonding precision and force distributionVSAvoidelectrical connection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The connection structures are divided into conductive connection elements for electrical connection and non-conductive auxiliary elements for bonding support. This allows the total area to be reduced while maintaining adequate electrical connection capacity through the specialized connection elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different areas of the connection structure serve different functions: connection elements concentrated in specific areas provide electrical connection, while auxiliary elements distributed across the area provide bonding support and force distribution. This local functional differentiation enables area reduction while maintaining both bonding precision and electrical reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the stability and reliability of chip connections by reducing the probability of contact errors and structural modifications, ensuring stable operation of the semiconductor device.

Implementation Method 1

applying a reduced bonding force to prevent modification of pre-formed connections, and using a process that applies heat and pressure to secure the chip stack on a substrate

Methodology Applied
Scientific EffectHeat: Heating

Implementation Method 2

using a process that applies heat and pressure to secure the chip stack on a substrate

Methodology Applied
Scientific EffectPressure: Pressure Increase

Data Source

PatentUS8766455B2Stacked semiconductor devices and fabrication methods thereof
Publication Date: 2014.07.01 SAMSUNG ELECTRONICS CO LTD
  • US8766455B2 patent drawing
  • US8766455B2 patent drawing
  • US8766455B2 patent drawing

AI summary

A semiconductor device includes a first semiconductor chip, a first connection structure disposed on a first side of the first semiconductor chip, a second semiconductor chip disposed on a second side of the first semiconductor chip, and a second connection structure disposed between the first and second semiconductor chips, wherein a number of the second connection structures is less than a number of the first connection structures.