Stacked Semiconductor Device Manufacturing via Dicing Before Grinding
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Solution Overview
Problem
In semiconductor device manufacturing, the CoW technology faces challenges in accurately positioning stacked semiconductor chips without interfering with planned dividing lines, leading to defective products and reduced productivity due to the need for high accuracy and the use of thick cutting blades.
Innovation Solution
The method involves forming dividing grooves on the semiconductor wafer before stacking, allowing for lower accuracy in chip positioning and using a thin cutting blade, with the grooves being exposed and the wafer thinned during the dicing process, known as 'dicing before grinding', to enhance productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high accuracy positioning is required for stacked semiconductor chips to avoid interfering with planned dividing lines, then product defect rate decreases, but manufacturing complexity and time increase
Solution Approach 1:
The patent applies preliminary action by forming dividing grooves on the wafer surface before stacking the semiconductor chips. This pre-formed groove structure provides a physical guide that automatically positions the chips during stacking, eliminating the need for high-precision positioning operations and reducing manufacturing time while preventing positioning errors that would cause defects.
2Strength
If a thick cutting blade is used to secure strength for cutting through stacked chips, then blade strength increases, but the width of planned dividing lines must increase, reducing the number of devices per wafer
Solution Approach 1:
The patent applies segmentation by dividing the cutting process into two stages: first cutting only the wafer substrate along the planned dividing lines, then separately cutting the stacked chips. This eliminates the need for a single thick blade to cut through the entire stack, allowing the use of thinner blades and narrower dividing lines, thereby increasing the number of devices that can be produced per wafer.
3Length of stationary object
If the amount of protrusion of the cutting edge is increased to cope with increased stack height, then the cutting blade can reach the bottom of the stack, but a thicker blade is required, increasing dividing line width
Solution Approach 1:
The patent segments the cutting operation into separate steps: wafer cutting and chip cutting. This allows the cutting edge to be optimized for each specific task rather than requiring excessive protrusion to reach through the entire stack, enabling the use of thinner blades and narrower dividing lines that increase productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables secure stacking of semiconductor chips without high accuracy requirements and allows for the use of thin cutting blades, increasing productivity by reducing the width of the planned dividing lines and preventing chip defects.
Implementation Method 1
a dividing step of grinding the back side of the semiconductor wafer until the dividing grooves are exposed and the first semiconductor chips are thinned to the finished thickness
Data Source
AI summary
A method of manufacturing a stacked-type semiconductor device, including the steps of: forming dividing grooves, having a depth corresponding to a finished thickness for a plurality of first chips formed on the face side of a wafer, on the face side of the wafer along planned dividing lines; stacking existing second chips on the first chips; covering the face-side surfaces of the second chips with a protective member; and grinding the back side of the wafer until the dividing grooves are exposed and the first chips are thinned to the finished thickness, to obtain semiconductor devices of a two-layer structure.