Stacked Semiconductor Dies with Through-Mold Vias
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Solution Overview
Problem
Current high-density memory devices, such as solid state drives, face challenges in cost and complexity due to the use of through-silicon vias (TSV) for electrical connections, which are expensive and require additional components like interposers.
Innovation Solution
The semiconductor device employs a stacked configuration with aligned active edges for a redistribution layer (RDL) and through-mold vias (TMVs) to provide a high-density fan-out memory solution, reducing costs and complexity by using a molded block with solder balls for electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If through-silicon vias (TSV) are used to connect stacked semiconductor dies, then high-density memory is achieved, but manufacturing cost and device complexity increase due to expensive processes and additional interposer components
Solution Approach 1:
The patent extracts and eliminates the interposer component from the stacked die architecture. By directly connecting bond pads on adjacent dies through the silicon substrate without requiring an intermediate interposer layer, the design simplifies the overall structure while maintaining high-density memory capabilities through vertical stacking
Solution Approach 2:
The patent introduces a conductive layer as an intermediary element that replaces the traditional interposer. This conductive layer is integrated within the silicon substrate itself, providing the necessary electrical connection between stacked dies without requiring a separate interposer component, thereby reducing complexity while enabling high-density configurations
2Quantity of substance
If through-silicon vias (TSV) are used for electrical connections between stacked dies, then high-density memory is achieved, but manufacturing cost increases due to expensive TSV processes
Solution Approach 1:
The patent employs a conductive layer that can be integrated using standard semiconductor manufacturing processes rather than expensive TSV techniques. This approach uses more conventional, cost-effective materials and processes to achieve the same electrical connection function, significantly reducing manufacturing costs while maintaining high-density memory performance
3Quantity of substance
If semiconductor dies are completely overlapped for stacking, then high-density memory is achieved, but additional interposer components are required increasing complexity
Solution Approach 1:
The patent merges the functions of the silicon substrate and the interposer into a single integrated structure. The conductive layer is formed within the silicon substrate itself, combining the mechanical support function of the substrate with the electrical connection function previously performed by a separate interposer, thereby eliminating the need for additional components and reducing overall device complexity
Data Source
AI summary
A semiconductor device is disclosed including one or more stacks of semiconductor dies vertically molded together in an encapsulated block. The semiconductor dies may comprise memory dies, or memory dies and a controller die.