3D Stacked Semiconductor Package With Flat-Bonded Passive Components
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Solution Overview
Problem
Existing stacked semiconductor packages face challenges in reducing thickness due to the use of solder balls or solder paste for connecting semiconductor packages and capacitors, leading to increased overall thickness.
Innovation Solution
A stacked semiconductor package design that includes a first substrate and a three-dimensional device with semiconductor integrated circuit and passive components stacked in a specific direction, where flat surfaces of these components are bonded together for direct contact and connected to the substrate using connection members, allowing for a reduction in thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder balls or solder paste are used to connect the first semiconductor package, second semiconductor package, and capacitor, then the components can be connected to each other, but the overall thickness of the stacked semiconductor package becomes large
Solution Approach 1:
The patent introduces a substrate as an intermediary platform that receives solder balls from multiple semiconductor packages and capacitors. This mediator enables vertical stacking connections through the substrate thickness, replacing traditional lateral solder joint arrangements that increase overall package thickness. The substrate acts as a common connection platform that reduces the vertical dimension while maintaining reliable electrical connections.
2Area of stationary object
If the footprint of the stacked semiconductor package is reduced by stacking components vertically, then the area is minimized, but the thickness increases due to solder connections
Solution Approach 1:
The patent transitions from a two-dimensional lateral connection approach to a three-dimensional vertical stacking architecture. By arranging semiconductor packages and capacitors in vertical layers connected through solder balls on a substrate, the design achieves compact footprint area while managing thickness through the substrate's vertical connection capability. This dimensional reorganization allows components to be stacked rather than spread out, optimizing the area-to-thickness ratio.
3Length of stationary object
If flat surfaces of semiconductor integrated circuit component and passive component are bonded together with direct contact, then the thickness of the three-dimensional device is reduced, but the bonding process becomes more complex
Solution Approach 1:
The patent employs preliminary actions in the manufacturing process by pre-forming flat bonding surfaces on semiconductor integrated circuit components and passive components before assembly. These surfaces are prepared with appropriate flatness and cleanliness in advance, enabling direct contact bonding that reduces final device thickness. The preliminary preparation of bonding surfaces simplifies the actual bonding operation by ensuring proper alignment and contact quality beforehand.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a reduction in the thickness of the stacked semiconductor package while maintaining mechanical and electrical connections, enhancing noise reduction and power control.
Implementation Method 1
The flat surface of the semiconductor integrated circuit component and the flat surface of the passive component are bonded together while being in contact with each other
Data Source
AI summary
A stacked semiconductor package includes a first substrate; a three-dimensional device stacked in a first direction with respect to the first substrate; and a first connection member for connecting the first substrate to the three-dimensional device. The three-dimensional device includes components, each of which includes a semiconductor integrated circuit component and a passive component stacked in the first direction. A first major surface, which faces the three-dimensional device, of the first substrate and a first major surface, which faces the first substrate, of the three-dimensional device are connected to each other with the first connection member interposed therebetween while being separated from each other. A first major surface, which faces the passive component, of the semiconductor integrated circuit component and a first major surface, which faces the semiconductor integrated circuit component, of the passive component each include a flat surface.