Stacked Semiconductor Package Homogeneous Spacer Adhesion

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Solution Overview

Problem

Conventional stacked semiconductor packages experience delamination issues due to poor adhesion strength between the silicon spacer and the encapsulation, leading to reduced reliability.

Innovation Solution

The use of spacers and encapsulation made from the same material, with spacers being mounted on the substrate alongside the first chip to enhance stability and adhesion, and an encapsulation process that fills gaps between the spacers and the second chip to prevent delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a silicon spacer is used to enhance the stability of the second chip, then the stability is improved, but the adhesion strength between the spacer and encapsulation deteriorates

Engineering Contradiction:

Improvestability of the second chipVSAvoidadhesion strength between spacer and encapsulation

Core Design Contradiction:

Stability of the object's compositionVSStrength

Solution Approach 1:

The spacer and encapsulation are made from the same material (molding compound), creating homogeneity in material composition. This eliminates the adhesion problem between dissimilar materials (silicon spacer and encapsulation) while maintaining the structural stability function of the spacer.

Inventive Principle:

Principle #33Homogeneity

2Adaptability or versatility

If different materials are used for the spacer and encapsulation, then the functional requirements are met, but the adhesion between them deteriorates

Engineering Contradiction:

Improvefunctional requirements fulfillmentVSAvoidadhesion between spacer and encapsulation

Core Design Contradiction:

Adaptability or versatilityVSStrength

Solution Approach 1:

Both the spacer and encapsulation are formed from the same molding compound material, ensuring homogeneous material properties throughout. This eliminates interfacial adhesion issues while the spacer's geometric structure (disposed beside the first chip with gaps) provides the necessary functional support for the second chip.

Inventive Principle:

Principle #33Homogeneity

3Ease of manufacture

If the encapsulation does not fill the gaps between spacers and chips, then the manufacturing process is simpler, but the reliability deteriorates due to delamination

Engineering Contradiction:

Improvemanufacturing process simplicityVSAvoidreliability of stacked semiconductor package

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The spacer is pre-formed from molding compound with built-in gap structures beside the first chip. This preliminary formation of the spacer with integrated gaps eliminates the need for subsequent gap-filling operations, simplifying manufacturing while ensuring complete encapsulation and preventing delamination.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11670622B2Stacked semiconductor package and packaging method thereof

Publication Date: 2023.06.06 POWERTECH TECHNOLOGY INC

AI summary

A stacked semiconductor package has a substrate, a first chip, at least one spacer, a second chip and an encapsulation. The first chip and the second chip are intersecting stacked on the substrate. The at least one spacer is stacked on the substrate to support the second chip. The encapsulation is formed to encapsulate the substrate, the first chip, the at least one spacer and the second chip. The at least one spacer is made of the material of the encapsulation. Therefore, the adhesion between the at least one spacer and the encapsulation is enhanced to avoid the delamination during the reliability test and enhances the reliability of the stacked semiconductor package.