Stacked Semiconductor Layer Structure for Insulation and Strength

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Solution Overview

Problem

The existing semiconductor devices with stacked semiconductor substrates face challenges in maintaining mechanical strength and reliability due to issues with insulating characteristics and oxygen concentration, which affect the performance and image quality.

Innovation Solution

A semiconductor device configuration where a second semiconductor layer is sandwiched between a first and third semiconductor layer, with insulating layers and conductive members strategically placed to enhance mechanical strength and reliability, and oxygen concentration is controlled in each layer to prevent defects and afterimages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple semiconductor substrates are stacked to increase integration, then device functionality and image quality are improved, but mechanical strength and reliability deteriorate due to insulating characteristic issues and oxygen concentration problems

Engineering Contradiction:
Improvedevice functionalityVSAvoidmechanical strength
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating oxygen concentration control across different semiconductor layers. The second semiconductor layer is maintained at a higher oxygen concentration (1×10^18 to 1×10^20 atoms/cm³) compared to the first and third layers (1×10^16 to 1×10^18 atoms/cm³). This localized variation in material properties prevents defects and afterimages in the second layer while maintaining mechanical strength, resolving the contradiction between enhanced functionality through stacking and reliability concerns.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs composite material principles by creating a multi-layer semiconductor structure with deliberately different oxygen concentrations in each layer. This composite approach allows the device to leverage the benefits of multiple substrates (improved functionality and image quality) while the specific oxygen concentration distribution maintains mechanical strength and reliability, preventing the deterioration that would normally occur with stacked configurations.

Inventive Principle:
Principle #40Composite materials

2Reliability

If insulating layers are added between semiconductor substrates to maintain electrical isolation, then electrical characteristics are improved, but mechanical strength deteriorates

Engineering Contradiction:
Improveinsulating characteristicsVSAvoidmechanical strength
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent applies parameter changes by optimizing the oxygen concentration parameter in the semiconductor layers rather than relying solely on insulating layer thickness or material composition. By controlling oxygen concentration to be within 1×10^18 to 1×10^20 atoms/cm³ in the second layer, the patent achieves both good insulating characteristics and maintained mechanical strength, eliminating the need for thick insulating layers that would compromise structural integrity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4307379A1Semiconductor device
Publication Date: 2024.01.17 CANON KK
  • EP4307379A1 patent drawingFigure 1
  • EP4307379A1 patent drawingFigure 2
  • EP4307379A1 patent drawingFigure 3~4

AI summary

A semiconductor device (1) in which semiconductor layers are stacked is provided. A first structure (1015) is arranged between a first semiconductor layer (1001) and a second semiconductor layer (1002). A second structure (1025) is arranged between the second semiconductor layer (1002) and a third semiconductor layer (1003). In an orthographic projection to the third semiconductor layer (1003), a region where elements (305) are arranged in the third semiconductor layer (1003) is a first region (2), and a region between the first region (2) and a peripheral portion of the third semiconductor layer (1003) is a second region (3). In the second region (3), an opening (6) that extends through the third semiconductor layer (1003), the second structure (1025) and the second semiconductor layer (1002) and exposes an electrode (105) arranged in the first structure (1015) is arranged. Between the first region (2) and the opening (6), an insulator (206) is arranged at the same height as the second semiconductor layer (1002).