Stacked Semiconductor Wiring Near the Joining Plane

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Solution Overview

Problem

In solid-state imaging devices, the region near the joining plane of semiconductor substrates is not effectively utilized, leading to inefficiencies in signal transmission and increased resistance due to the presence of dummy conductor patterns or oxide films without conductors.

Innovation Solution

The conductors near the joining plane are electrified in the direction of the joining plane, with specific configurations such as longer plane sides, varying shapes, and orientations to function as wirings for one or both substrates, effectively utilizing the region and reducing resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If dummy conductor patterns or oxide films are present in the region near the joining plane, then the structure is simplified, but the wiring resistance increases and signal transmission deteriorates

Engineering Contradiction:
Improvestructure simplicityVSAvoidsignal transmission quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent changes the electrical state parameter of conductors near the joining plane from floating (dummy) or insulating (oxide film) to electrified (connected to ground or power supply). This parameter change transforms harmful elements into useful shielding structures, reducing wiring resistance and improving signal transmission without adding complex structures.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts dummy conductor patterns and oxide films, which were previously harmful or useless elements, into beneficial shielding structures by electrifying them. These electrified conductors now serve as ground or power supply lines, actively reducing wiring resistance and improving signal transmission quality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Ease of manufacture

If the region near the joining plane is not utilized, then the manufacturing process is simplified, but the wiring resistance increases

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidwiring resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent makes the region near the joining plane serve multiple functions: it continues to provide structural support and alignment while simultaneously functioning as electrified conductors for ground or power supply. This multi-functionality utilizes the existing region effectively without complicating the manufacturing process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If through connection conductors are used to connect semiconductor substrates, then the connection reliability is improved, but the device complexity increases

Engineering Contradiction:
Improveconnection reliabilityVSAvoidconnection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the function of through connection conductors with the electrified dummy conductors near the joining plane. By connecting these electrified conductors to ground or power supply, the patent creates an integrated connection structure that maintains reliability while reducing overall complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12002831B2Semiconductor device
Publication Date: 2024.06.04 SONY SEMICON SOLUTIONS CORP
  • US12002831B2 patent drawing
  • US12002831B2 patent drawing
  • US12002831B2 patent drawing

AI summary

Effective use is achieved of a region in a proximity of a joining plane of semiconductor substrates in a semiconductor device including a stacked semiconductor substrate in which multilayer wiring layers of a plurality of semiconductor substrates are electrically connected to each other. The stacked semiconductor substrate includes plural semiconductor substrates on each of which a multilayer wiring layer is formed. In this stacked semiconductor substrate, the multilayer wiring layers are joined together and electrically connected to each other. In the proximity of a joining plane of the plurality of semiconductor substrates, a conductor is formed. This conductor is formed such that it is electrified in a direction of the joining plane.