Stacked Semiconductor Device Low-Profile Wire Embedding
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Solution Overview
Problem
Existing stacked semiconductor devices face challenges in minimizing the loop height of metal wires to prevent insulation failures and short circuits when stacking semiconductor elements of different sizes, as conventional bonding methods are limited in reducing wire loop height effectively.
Innovation Solution
The solution involves using a circuit substrate with an element mounting section and a connection portion, where a first semiconductor element is mounted with a metal bump formed on its electrode pad, and a second semiconductor element is stacked via a spacer layer, with metal wires contacting the insulating protection film to reduce loop height, ensuring the wires do not touch the second semiconductor element, thereby preventing contact and potential failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional bonding methods are used to connect metal wires to semiconductor elements, then the wiring function is achieved, but the loop height of the metal wires becomes too large causing contact with upper semiconductor elements
Solution Approach 1:
The patent introduces an insulating film as an intermediary layer between the metal wire and the semiconductor element. The metal wire is embedded in the insulating film, which acts as a mediator to provide electrical insulation while allowing the wire to maintain a low profile. This resolves the contradiction by enabling the wire to stay close to the semiconductor surface without causing insulation failures.
Solution Approach 2:
The patent uses a sacrificial organic substance that is deposited, patterned, and then completely removed after serving its temporary purpose of defining the wire embedding position. This disposable approach allows precise positioning of the metal wire in the insulating film without leaving residual material that would interfere with subsequent semiconductor element stacking.
2Reliability
If the wire loop height is reduced to prevent contact with upper elements, then insulation reliability improves, but the wiring process becomes more complex
Solution Approach 1:
The patent performs preliminary actions by first forming the insulating film and embedding the metal wire in it before stacking the semiconductor elements. The organic substance is deposited and patterned in advance to define the wire position. This preliminary preparation simplifies the overall process by establishing the low-profile wire configuration before the critical stacking operation, avoiding the need for complex post-stack adjustments.
Solution Approach 2:
The patent replaces traditional mechanical wire bonding methods with a chemical deposition approach. Instead of using mechanical force to create and secure wire loops, the metal wire is embedded in a deposited insulating film that is formed through chemical vapor deposition or similar processes. This substitution eliminates the need for complex mechanical bonding equipment and procedures while achieving reliable low-profile wire connections.
3Adaptability or versatility
If semiconductor elements of different sizes are stacked, then device integration is achieved, but metal wires may contact upper elements causing short circuits
Solution Approach 1:
The patent uses a sacrificial organic substance that is deposited, patterned, and then completely removed after serving its temporary purpose of defining the wire embedding position. This disposable approach allows precise positioning of the metal wire in the insulating film without leaving residual material that would interfere with subsequent semiconductor element stacking.
Solution Approach 2:
The patent applies local quality by creating a specific embedding structure only where the metal wire needs to be positioned. The insulating film with embedded wire is formed locally at the wire bonding area, while the rest of the semiconductor element surface maintains its original properties. This localized modification allows different sized elements to be stacked without the wire interfering with upper elements, while preserving the functionality of the semiconductor device.
Data Source
AI summary
A stacked semiconductor device includes a first semiconductor element mounted on a circuit substrate and a second semiconductor element stacked on the first semiconductor element via a spacer layer. An electrode pad of the first semiconductor element is electrically connected to a connection portion of the circuit substrate through a first metal wire. A vicinity of the end portion of the first metal wire connected to the electrode pad is in contact with an insulating protection film which covers the surface of the first semiconductor element.