Stacked Semiconductor Structure for MEMS CMOS Integration

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The integration of micro-electro-mechanical system (MEMS) and complementary metal-oxide-semiconductor (CMOS) devices in stacked semiconductor structures faces challenges due to differences in circuit fabrication technologies, making it difficult to manufacture devices with multiple functions effectively.

Innovation Solution

A method for forming a stacked semiconductor structure that includes a MEMS device and a CMOS device, where the MEMS device features a flexible top electrode with variable capacitance for RF signal control, and the CMOS device includes a multilayer interconnect and bonding features for electrical connection, allowing for the integration of both devices through bonding and etching processes to create a movable structure suspended over a cavity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If MEMS and CMOS devices are integrated in stacked semiconductor structures, then functionality and performance are improved, but manufacturing difficulty increases due to differences in circuit fabrication technologies

Engineering Contradiction:
ImprovefunctionalityVSAvoidmanufacturing difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent divides the semiconductor structure into separate MEMS and CMOS device regions that are fabricated independently using their respective optimized processes, then stacked together. This segmentation allows each device type to be manufactured using its own specialized fabrication technology while still achieving integrated functionality in the final stacked structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a stacked configuration where one semiconductor device is positioned directly over another, creating a nested vertical arrangement. The MEMS device and CMOS device are stacked in layers with bonding interfaces connecting them, enabling three-dimensional integration that combines multiple functions in a compact footprint while maintaining separate fabrication processes for each layer.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Adaptability or versatility

If multiple types of functions are integrated in stacked devices, then device capability is improved, but integration problems arise due to different circuit fabrication technologies

Engineering Contradiction:
Improvedevice capabilityVSAvoidintegration problems
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent separates the device into distinct MEMS and CMOS functional blocks that can be designed and fabricated independently. Each segment is optimized for its specific function using appropriate fabrication techniques, reducing the complexity of integrating different circuit technologies while maintaining multi-functionality in the stacked configuration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces bonding interfaces and interconnect structures as intermediary elements that bridge the MEMS and CMOS devices. These intermediaries facilitate electrical and mechanical connections between the stacked devices, managing the integration complexity by providing standardized interfaces that accommodate different fabrication technologies.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Volume of moving object

If MEMS and CMOS devices are stacked together, then space utilization is improved, but manufacturing process compatibility becomes more difficult

Engineering Contradiction:
Improvespace utilizationVSAvoidprocess compatibility
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The patent transitions from planar two-dimensional integration to three-dimensional vertical stacking, achieving higher space utilization by utilizing the vertical dimension. Multiple device layers are stacked one above another with bonding interfaces, enabling compact integration while allowing each layer to be fabricated using its own optimized process before stacking.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the integrated structure into separate manufacturable modules (MEMS device and CMOS device) that can be produced independently using process-compatible techniques for each device type, then assembled through stacking. This segmentation enables high space utilization through vertical integration while maintaining process compatibility by allowing independent optimization of each segment's fabrication.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables the effective integration of MEMS and CMOS devices, allowing for improved performance and functionality in applications such as RF MEMS switches, while maintaining mechanical strength and rigidity, and providing electrical connections for external circuits.

Implementation Method 1

The MEMS device features a flexible top electrode with variable capacitance for RF signal control

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The MEMS device features a flexible top electrode with variable capacitance for RF signal control

Methodology Applied
Scientific EffectElectrostatic field: Electric Field

Data Source

PatentUS11498832B2Stacked semiconductor structure and method of forming the same
Publication Date: 2022.11.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11498832B2 patent drawing
  • US11498832B2 patent drawing
  • US11498832B2 patent drawing

AI summary

A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.