Stacked Semiconductor Device MEMS CMOS Integration
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Solution Overview
Problem
The integration of micro-electro-mechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) devices in stacked semiconductor devices poses challenges due to differences in circuit fabrication technologies, making it difficult to manufacture devices with multiple functions effectively.
Innovation Solution
A method for forming a stacked semiconductor device involves etching a cavity in a substrate, filling it with sacrificial material, forming a flexible dielectric membrane, and creating metal units, followed by bonding features to integrate a MEMS device with a CMOS device, allowing for the formation of a movable structure that can be suspended over the cavity, enabling the integration of MEMS and CMOS devices while addressing integration issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If MEMS and CMOS devices are integrated in stacked configuration, then device functionality and performance are enhanced, but manufacturing difficulty increases due to differences in circuit fabrication technologies
Solution Approach 1:
The patent divides the stacked device into separate MEMS and CMOS layers that can be fabricated independently using their respective optimized processes, then bonded together. This segmentation allows each layer to be manufactured using appropriate fabrication techniques without compromising the other, resolving the manufacturing difficulty while maintaining enhanced functionality.
Solution Approach 2:
The patent introduces intermediate bonding layers and interface structures between the MEMS and CMOS devices that facilitate integration despite different fabrication requirements. These intermediary elements act as mediators that enable reliable electrical and mechanical connections between the two different device types, overcoming the manufacturing challenges of direct integration.
2Adaptability or versatility
If multiple types of functions are integrated in a single stacked device, then device performance improves, but integration complexity increases
Solution Approach 1:
The patent segments the integrated device into distinct functional modules (MEMS layer, CMOS layer, bonding interface) that can be designed, fabricated, and tested independently. This modular segmentation reduces integration complexity by allowing each function to be optimized separately while maintaining overall device performance through systematic assembly.
Solution Approach 2:
The patent resolves integration complexity by transitioning from planar integration to three-dimensional stacked architecture. By stacking MEMS and CMOS devices vertically, the patent enables multiple functions to coexist in different spatial layers, reducing lateral interference and simplifying the integration process while enhancing overall device performance.
Data Source
AI summary
A stacked semiconductor device includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. The cavity has an interior surface. A stop layer is disposed over the interior surface of the cavity. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.