Stacked Semiconductor Package with Bridge Die Power Paths
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Solution Overview
Problem
The increasing demand for multifunctional and high-volume data processing in electronic products poses a challenge due to limitations in semiconductor integration technology, necessitating the use of semiconductor packages with multiple chips stacked in a vertical direction to enhance functionality.
Innovation Solution
A semiconductor package design that includes a base layer, multiple semiconductor chips stacked vertically, bridge die stacks for power supply, and vertical interconnectors for signal transmission, with asymmetrically formed power and signal transmission paths to efficiently connect chips and reduce resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor chips are stacked vertically to increase integration density, then the degree of integration is improved, but the complexity of electrical connections between chips increases
Solution Approach 1:
The patent divides the connection functions into separate dedicated structures: bridge die stacks for power supply connections and vertical interconnectors for signal transmissions. This segmentation allows each connection type to be optimized independently, reducing overall connection complexity while maintaining high integration density through vertical stacking of multiple semiconductor chips.
2Use of energy by moving object
If power supply paths are provided through bridge die stacks, then power supply efficiency is improved, but the device structure becomes more complex
Solution Approach 1:
The patent introduces bridge die stacks as intermediary structures between the base layer and the first semiconductor chip. These bridge die stacks serve as dedicated power supply pathways, improving power delivery efficiency by providing direct vertical connections. The bridge die stacks act as mediators that simplify the overall power distribution architecture despite adding structural elements.
3Speed
If vertical interconnectors are used for signal transmission, then signal transmission speed is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent transitions signal transmission from horizontal routing to vertical routing by implementing vertical interconnectors that extend through the stacked semiconductor chips. This dimensional change enables shorter signal paths and faster transmission speeds. The vertical orientation naturally provides better alignment tolerance compared to precise horizontal routing, as vertical positioning is controlled by the standardized chip stacking process.
Data Source
AI summary
A semiconductor package may include a base layer; a first semiconductor chip disposed over and spaced apart from the base layer; a second semiconductor chip stack disposed between the base layer and the first semiconductor chip, the second semiconductor chip stack including a plurality of second semiconductor chips that are stacked in a vertical direction; a bridge die stack disposed between the base layer and the first semiconductor chip and disposed to be spaced apart from the second semiconductor chip stack, the bridge die stack including a plurality of bridge dies that are stacked in the vertical direction and electrically connecting the first semiconductor chip and the base layer to supply power; and a vertical interconnector disposed between the base layer and the first semiconductor chip and disposed to be spaced apart from the second semiconductor chip stack and the bridge die stack, the vertical interconnector electrically connecting the first semiconductor chip and the base layer to transmit a signal.