Stacked Semiconductor Package Layout for Heat Dissipation
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Solution Overview
Problem
As semiconductor packages are miniaturized and made lighter to meet the demand for portable devices, they face challenges in efficiently dissipating heat, as the conventional molding members with lower thermal conductance hinder effective heat dissipation from the semiconductor chips.
Innovation Solution
The semiconductor package design includes a first semiconductor chip with a high thermal conductance, a second semiconductor chip stacked on top, and a molding member that surrounds only a portion of the first chip, allowing heat to be dissipated efficiently through the second chip, which is thicker and has a larger contact area, and a second redistribution structure that enhances heat transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If semiconductor packages are miniaturized and made lighter, then the volume and weight of the package are reduced, but the heat dissipation capability deteriorates
Solution Approach 1:
The patent transitions from planar heat dissipation to three-dimensional heat dissipation by stacking multiple semiconductor chips vertically. The first semiconductor chip is positioned on the redistribution structure, and the second semiconductor chip is stacked on top of the first chip, creating vertical heat dissipation paths that enable effective thermal management in miniaturized packages.
Solution Approach 2:
The patent divides the heat dissipation function across multiple separate semiconductor chips rather than relying on a single chip. Each chip has its own heat dissipation path through the molding member, allowing heat to be distributed and dissipated from multiple locations simultaneously, improving overall thermal performance in a compact volume.
2Ease of manufacture
If a molding member with lower thermal conductance is used, then the package structure is simplified and manufacturing is easier, but heat dissipation from semiconductor chips is hindered
Solution Approach 1:
The patent applies different material properties to different regions of the package. The molding member has lower thermal conductance for structural simplicity, but the semiconductor chips themselves have high thermal conductance to serve as localized heat dissipation pathways. This local quality differentiation allows the system to achieve both manufacturing ease and effective heat dissipation.
Solution Approach 2:
The semiconductor chips act as intermediary heat transfer elements between the heat-generating components and the external environment. Even though the molding member has low thermal conductance, the high thermal conductance of the semiconductor chips provides an alternative heat dissipation route, mediating the thermal transfer from the internal components to the outside.
3Temperature
If the second semiconductor chip is made thicker with larger contact area, then heat dissipation is improved, but the package height increases
Solution Approach 1:
The patent resolves the height issue by utilizing the vertical stacking dimension. Instead of increasing the footprint area of a single chip, the design stacks multiple chips vertically, each with optimized thickness. The second semiconductor chip is positioned above the first chip, allowing heat dissipation through the vertical dimension without significantly increasing the overall package footprint, thereby maintaining compact dimensions while improving thermal performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively dissipates heat by utilizing the higher thermal conductance of the first semiconductor chip and the increased contact area of the second chip, improving heat dissipation and maintaining package height while reducing the footprint.
Implementation Method 1
a first semiconductor chip which is on the first redistribution structure and includes a first semiconductor substrate, a through electrode passing through the first semiconductor substrate, and a first device layer on the first semiconductor substrate, a second semiconductor chip which is on the first semiconductor chip and includes a second semiconductor substrate and a second device layer on the second semiconductor substrate
Data Source
AI summary
A semiconductor package includes a first redistribution structure, a first semiconductor package on the first redistribution structure, the first semiconductor package including a first semiconductor chip which includes a first device layer and a first semiconductor substrate including a through electrode, a second semiconductor chip which is on the first semiconductor chip and includes a second device layer and a second semiconductor substrate, and a molding member surrounding the first semiconductor chip, a second redistribution structure on an upper surface of the molding member, and a second semiconductor package on the second redistribution structure, the second semiconductor package including a third semiconductor chip, wherein the second semiconductor chip is apart from the second semiconductor package in a horizontal direction, and an upper surface of the second semiconductor chip is higher than the upper surface of the molding member.