Stacked Semiconductor Refresh Signal Generation
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Solution Overview
Problem
3D semiconductor apparatuses face limitations in integration density due to processing skews during manufacturing, leading to potential overlapping of refresh operations among stacked chips, which can result in peak current issues and decreased power levels.
Innovation Solution
A stacked semiconductor apparatus where one chip generates and transmits refresh period signals to other chips based on chip ID signals, allowing each chip to selectively receive and perform refresh operations independently, thereby avoiding overlapping and stabilizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are performed independently on each stacked chip, then each chip can maintain its data, but processing skews cause refresh operations to overlap resulting in peak current issues and decreased power levels
Solution Approach 1:
The patent combines the refresh control functions of multiple stacked chips into a single master chip that generates and distributes refresh period signals to all slave chips. This centralized control merges previously independent refresh operations into a coordinated system, eliminating overlapping refresh operations and stabilizing power consumption across the 3D semiconductor apparatus.
Solution Approach 2:
The master chip receives chip ID signals from slave chips and uses this feedback information to generate appropriately timed refresh period signals for each specific slave chip. This feedback mechanism enables the master chip to coordinate refresh operations based on the identity and position of each slave chip, preventing simultaneous refresh operations that would cause peak current.
2Productivity
If multiple chips are stacked to improve integration density, then more memory capacity is achieved, but processing skews during manufacturing prevent sequential operation of stacked chips
Solution Approach 1:
The master chip acts as an intermediary that receives external refresh commands and translates them into coordinated internal refresh operations for all slave chips. This intermediary role allows the system to tolerate manufacturing variations and processing skews, as the master chip can compensate for timing differences by generating customized refresh period signals for each slave chip based on chip ID signals.
3Ease of operation
If each chip generates its own refresh signals independently, then each chip operates autonomously, but refresh operations overlap causing peak current issues
Solution Approach 1:
The patent segments the refresh control function by designating one master chip to handle refresh signal generation while other chips function as slaves. This segmentation separates the control function from the execution function, allowing autonomous operation to be maintained at the chip level while coordinating refresh operations at the system level to prevent peak current.
Data Source
AI summary
A stacked semiconductor apparatus includes a plurality of chips which are stacked one upon the other. One chip of the plurality of chips may be configured to generate a plurality of refresh period signals for performing refresh operations within the plurality of chips, and may be configured to transmit the plurality of refresh period signals to the plurality of chips excluding the one chip. The plurality of chips may respectively receive refresh period signals allocated to them according to chip ID signals, and may perform the refresh operations.