Stacked Semiconductor Device with Shared Electrode for Miniaturization

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Solution Overview

Problem

Existing semiconductor devices are limited in their ability to be miniaturized while maintaining efficient electrical connections and reducing current density, which can lead to increased risk of destruction due to high current density.

Innovation Solution

The semiconductor device design includes a configuration with stacked semiconductor element units connected by a shared electrode, surrounded by n+ and n− type semiconductor regions, and conductive portions electrically connected to the first electrode, reducing electrical resistance and current density through a seamless conductive structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the device size is reduced, then mounting density increases, but current density increases leading to higher risk of device destruction

Engineering Contradiction:
Improvedevice sizeVSAvoidrisk of device destruction
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar electrode arrangement to a three-dimensional stacked configuration where semiconductor element units are arranged vertically and connected through intermediate electrodes. This dimensional change allows current paths to extend through multiple layers, effectively distributing current density across a larger volume while maintaining a compact footprint, thus reducing the risk of device destruction during miniaturization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the semiconductor device into multiple semiconductor element units (first, second, third units) with corresponding electrodes (first, second, third electrodes) arranged in stacked layers. This segmentation creates multiple current paths and distributes electrical load across several components, preventing excessive current density concentration in any single element and improving overall device reliability during miniaturization

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If semiconductor element units are stacked to reduce device footprint, then mounting density increases, but electrical resistance may increase due to additional connection interfaces

Engineering Contradiction:
Improvedevice footprintVSAvoidelectrical resistance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent merges multiple electrode functions into shared intermediate electrodes. The second electrode serves dual purposes: it acts as the output electrode for the second semiconductor element unit and simultaneously as the input electrode for the third semiconductor element unit. This merging eliminates the need for separate connection interfaces, reducing cumulative electrical resistance while achieving compact stacked arrangement

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent ensures continuous electrical connection through seamless electrode integration across stacked semiconductor element units. The intermediate electrodes provide uninterrupted current paths between units, maintaining continuous useful action (electrical conduction) throughout the stacked structure. This continuity minimizes resistance increases that would otherwise result from multiple discrete connection interfaces

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for a reduction in device size, increased mounting density, and lower current density, thereby reducing the risk of device destruction while maintaining efficient electrical connections.

Implementation Method 1

conductive portions electrically connected to the first electrode, reducing electrical resistance and current density through a seamless conductive structure

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS9853023B2Semiconductor device and semiconductor package
Publication Date: 2017.12.26 KK TOSHIBA
  • US9853023B2 patent drawing
  • US9853023B2 patent drawing
  • US9853023B2 patent drawing

AI summary

A semiconductor package in an embodiment includes a semiconductor device which has a first semiconductor element, a second semiconductor element, and a common first electrode between the first and second semiconductor elements. A second electrode is electrically connected to the first semiconductor element. A third electrode extends through the second semiconductor element and electrically connects to the first electrode. A fourth electrode is electrically connected to the second semiconductor element. A first terminal of the package is electrically connected to the third electrode. A second terminal of the package is electrically connected to the second electrode and the fourth electrode. An insulating material surrounds the semiconductor device.