Stacked Semiconductor Device Signal Path Segmentation

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Solution Overview

Problem

As the number of stacked semiconductor dies increases, the load on signal paths, including through-substrate vias (TSVs), degrades signal transfer speed and reliability due to increased junction capacitance, leading to potential signal distortion and malfunction, especially when pulse widths are narrow or frequencies are high.

Innovation Solution

The implementation of a stacked semiconductor device with two signal paths, each including at least one TSV, where a transmission unit generates synchronized driving signals for both paths, and a reception unit receives attenuated signals to maintain the duty cycle and pulse width of the transmission signal, effectively managing high signal path loads by transforming the transmission signal into two driving signals for efficient transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of stacked semiconductor dies is increased, then memory capacity is increased, but signal transfer speed and reliability are degraded due to increased load on signal paths

Engineering Contradiction:
Improvememory capacityVSAvoidsignal transfer reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The signal path is segmented into two separate paths (first signal path and second signal path) to distribute the signal transfer load. Each path carries a portion of the signal traffic, reducing the burden on individual signal paths and maintaining signal integrity despite increased stacking density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Synchronized driving signals are introduced as intermediaries to facilitate signal transfer through the TSVs. The driving signals are generated in synchronization with the transmission signal to ensure proper timing and reduce signal degradation, acting as a mediator between the transmission and reception units.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the number of stacked semiconductor dies is increased, then memory capacity is increased, but signal transfer speed is degraded due to increased junction capacitance

Engineering Contradiction:
Improvememory capacityVSAvoidsignal transfer speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The signal path is divided into two separate paths to reduce the capacitance load on each individual path. By splitting the signal transfer across multiple paths, the junction capacitance effect is distributed and reduced, allowing faster signal transfer speeds despite increased stacking.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Synchronized driving signals are applied periodically to the TSVs in coordination with the transmission signal transitions. This periodic synchronization ensures that signal transitions occur at optimal timing moments, reducing the impact of capacitive loading and maintaining high transfer speeds.

Inventive Principle:
Principle #19Periodic action

3Productivity

If synchronized driving signals are generated for two signal paths, then signal transfer efficiency is improved under high load, but device complexity increases

Engineering Contradiction:
Improvesignal transfer efficiencyVSAvoidsignal path complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The transmission unit generates both first and second driving signals simultaneously based on the same transmission signal. By combining the signal generation function into a single synchronized process, the complexity is managed while achieving improved transfer efficiency through dual-path signaling.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10373661B2Stacked semiconductor device and system including the same
Publication Date: 2019.08.06 SAMSUNG ELECTRONICS CO LTD
  • US10373661B2 patent drawing
  • US10373661B2 patent drawing
  • US10373661B2 patent drawing

AI summary

A stacked semiconductor device includes a plurality of semiconductor dies stacked in a vertical direction, first and second signal paths, a transmission unit and a reception unit. The first and second signal paths electrically connect the plurality of semiconductor dies, where each of the first signal path and the second signal path includes at least one through-substrate via. The transmission unit generates a first driving signal and a second driving signal in synchronization with transitioning timing of a transmission signal to output the first driving signal to the first signal path and output the second driving signal to the second signal path. The reception unit receives a first attenuated signal corresponding to the first driving signal from the first signal path and receives a second attenuated signal corresponding to the second driving signal from the second signal path to generate a reception signal corresponding to the transmission signal.