Stacked Semiconductor Devices With Single-Crystal Regions

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Solution Overview

Problem

Conventional methods for forming single-crystal silicon regions in stacked semiconductor devices are either time-consuming and costly or require complex patterning processes, making them inefficient for large-area formation.

Innovation Solution

The method involves forming spaced apart bonding surfaces on a first substrate, bonding a second single-crystal silicon substrate, and cleaving it to leave semiconductor regions, with specific techniques such as ion implantation and thermal treatment to control bonding and cleaving, allowing for the formation of single-crystal silicon regions without extensive photolithography.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If selective epitaxial growth is used to form single-crystal silicon regions, then single-crystal regions can be formed on interlevel insulating layers, but the process requires significant time and has high process cost

Engineering Contradiction:
Improvesingle-crystal region formationVSAvoidprocess time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent uses a single-crystal silicon substrate as a template or seed, bonding it to the interlevel insulating layer. The single-crystal structure is copied from the substrate to the desired regions through controlled bonding and selective removal, avoiding the time-consuming epitaxial growth process while maintaining single-crystal quality

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The single-crystal silicon substrate is prepared and bonded to the interlevel insulating layer before the actual formation of single-crystal regions. This preliminary bonding establishes the single-crystal template in advance, allowing subsequent selective removal to create single-crystal regions without requiring time-consuming in-situ growth

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If selective epitaxial growth is used to form single-crystal silicon regions, then single-crystal regions can be formed on interlevel insulating layers, but the process cost is relatively high

Engineering Contradiction:
Improvesingle-crystal region formationVSAvoidprocess cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent uses a single-crystal silicon substrate as a template or seed, bonding it to the interlevel insulating layer. The single-crystal structure is copied from the substrate to the desired regions through controlled bonding and selective removal, avoiding the time-consuming epitaxial growth process while maintaining single-crystal quality

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent employs a disposable single-crystal silicon substrate that is bonded to the insulating layer and then selectively removed. This substrate serves as a temporary, low-cost source of single-crystal structure, eliminating the need for expensive and time-consuming epitaxial growth equipment and processes

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Ease of manufacture

If bonding of crystalline silicon substrates is used to form single-crystal silicon regions, then single-crystal regions can be formed over wide area with low cost, but separate photolithography process is required to form single-crystal silicon patterns

Engineering Contradiction:
Improveprocess cost and area coverageVSAvoidpatterning process complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines the bonding process with the patterning process by forming protruding portions of the insulating layer at specific locations before bonding. These protruding portions serve as both bonding sites and pattern definitions, eliminating the need for separate photolithography steps to create single-crystal silicon patterns

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The insulating layer is formed with protruding portions at desired pattern locations before the single-crystal substrate is bonded. This preliminary structuring of the insulating layer pre-defines the pattern locations, so that when the substrate is bonded and selectively removed, single-crystal regions are automatically formed only at the protruding portion locations without requiring additional patterning steps

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach simplifies the process, reduces costs, and enables the formation of single-crystal silicon regions over large areas without the need for complex patterning, improving the efficiency and integration of semiconductor devices.

Implementation Method 1

A second substrate is bonded to the bonding surfaces of the first substrate

Methodology Applied
Scientific EffectBonding: Welding

Implementation Method 2

bonding the first and second substrates together to form a bonded structure

Methodology Applied
Scientific EffectThermal heating: Heating

Data Source

PatentUS7932163B2Methods of forming stacked semiconductor devices with single-crystal semiconductor regions
Publication Date: 2011.04.26 SAMSUNG ELECTRONICS CO LTD
  • US7932163B2 patent drawing
  • US7932163B2 patent drawing
  • US7932163B2 patent drawing

AI summary

Spaced apart bonding surfaces are formed on a first substrate. A second substrate is bonded to the bonding surfaces of the first substrate and cleaved to leave respective semiconductor regions from the second substrate on respective ones of the spaced apart bonding surfaces of the first substrate. The bonding surfaces may include surfaces of at least one insulating region on the first substrate, and at least one active device may be formed in and/or on at least one of the semiconductor regions. A device isolation region may be formed adjacent the at least one of the semiconductor regions.