Stacked Semiconductor Package Process Solder Ball Reliability
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Solution Overview
Problem
Conventional stacked-type semiconductor device package techniques face reliability issues due to poor bonding of large-sized solder balls between the wafer carrier and the carrier, leading to inferior package process reliability.
Innovation Solution
The process involves bonding a semiconductor substrate to a carrier, forming through silicon vias and pads, bonding chips using flip chip technology, and then forming solder balls on the substrate after the wafer level package is completed, allowing for improved bonding and increased package reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If solder balls of larger size are formed on the bottom surface of the wafer carrier before bonding, then the electrical connection and mechanical support are improved, but the bonding reliability between solder balls and adhesive layer deteriorates
Solution Approach 1:
The patent applies preliminary action by forming the solder balls on the wafer carrier before bonding the wafer to the carrier, then embedding them into the adhesive layer during the bonding process. This ensures proper embedding depth and bonding reliability while maintaining electrical connection and mechanical support functions.
Solution Approach 2:
The patent changes the parameter of solder ball size optimization by forming solder balls of controlled sizes on the wafer carrier before bonding. This allows achieving both adequate mechanical support/electrical connection and proper embedding into the adhesive layer, resolving the contradiction between bonding strength and reliability.
2Ease of manufacture
If the wafer carrier with solder balls is directly bonded to the carrier, then the manufacturing process is simplified, but the bonding quality deteriorates due to poor embedding of large solder balls
Solution Approach 1:
The patent applies preliminary action by pre-forming solder balls on the wafer carrier before bonding, then embedding them into the adhesive layer during the bonding process. This maintains manufacturing simplicity while achieving proper embedding depth and bonding quality.
Solution Approach 2:
The patent optimizes the solder ball size parameter and embedding depth to achieve both ease of manufacture and high bonding quality. By controlling these parameters, the process remains simple while ensuring reliable bonding.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents the bonding issues caused by large solder balls, enhancing the reliability and selectivity of the package process by forming solder balls on the substrate after separation from the carrier, thus improving the overall package process.
Implementation Method 1
The semiconductor substrate is thinned from a back side of the semiconductor substrate in opposite to the first surface
Implementation Method 2
A molding compound is formed on the second surface of the semiconductor substrate, wherein the molding compound covers the chips and the first pads
Implementation Method 3
plural solder balls are formed on the first surface of the semiconductor substrate, wherein the solder balls respectively electrically connect to the corresponding contacts
Implementation Method 4
Plural chips are bonded to the second surface of the semiconductor substrate, wherein the chips respectively electrically connect to the corresponding first pads
Data Source
AI summary
A package process is provided. The package process includes: disposing a semiconductor substrate on a carrier, wherein the semiconductor substrate has plural contacts at a side facing the carrier; thinning the semiconductor substrate from a back side of the semiconductor substrate and then forming plural through silicon vias in the thinned semiconductor substrate; forming plural first pads on the semiconductor substrate, wherein the first pads respectively connected to the through silicon vias; bonding plural chips to the semiconductor substrate, wherein the chips are electrically connected to the corresponding pads; forming a molding compound on the semiconductor substrate to cover the chips and the first pads; separating the semiconductor substrate and the carrier and then forming plural solder balls on the semiconductor substrate; and sawing the molding compound and the semiconductor substrate.