Stacked Single-Crystal Semiconductor Substrates for High-Resolution Micro-Displays
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Solution Overview
Problem
Current display devices for head-mounted display devices require high-resolution images, but existing fabrication methods are costly and have low yield due to the need for uniform semiconductor processes across different substrate sizes.
Innovation Solution
A micro-display device using two different single crystal semiconductor substrates, where the smaller substrate allows for higher yield and cost reduction by optimizing semiconductor processes, and the larger substrate enables high-resolution display with minimized unnecessary areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If uniform semiconductor processes are applied across different substrate sizes, then manufacturing consistency is maintained, but fabricating cost increases and yield decreases
Solution Approach 1:
The patent divides the semiconductor manufacturing process into separate stages for different substrate sizes. Small substrates (e.g., 2-inch) are processed independently from large substrates (e.g., 6-inch), allowing each to be optimized for its specific requirements. This segmentation enables high-yield mass production on small substrates while maintaining the capability for high-resolution displays on large substrates, thereby resolving the contradiction between manufacturing consistency and fabricating yield.
2Productivity
If small substrate size is used, then fabricating yield improves and cost reduces, but display resolution capability is limited
Solution Approach 1:
The patent transitions from a single-substrate approach to a multi-substrate stacked architecture. Small substrates are bonded to large substrates in a vertical configuration, allowing the system to achieve high resolution through the large substrate's area while maintaining high yield through the small substrate's efficient manufacturing. This dimensional transition from 2D planar to 3D stacked architecture resolves the contradiction between yield and resolution.
3Manufacturing precision
If large substrate area is used, then high-resolution display is achieved, but unnecessary regions increase and cost rises
Solution Approach 1:
The patent segments the functional areas of the display device by placing small active substrates containing only necessary pixel regions onto a larger carrier substrate. This segmentation allows the active display area to be maximized while minimizing wasted space on the carrier, as the small substrates can be densely packed and precisely positioned, reducing the proportion of unnecessary regions.
4Productivity
If different substrate sizes are processed together, then manufacturing efficiency improves, but process optimization for specific device sizes is compromised
Solution Approach 1:
The patent implements segmentation by processing small substrates and large substrates in separate manufacturing lines, each optimized for its specific substrate size. Small substrate lines are optimized for high-volume, cost-effective production, while large substrate lines are optimized for high-resolution precision manufacturing. This segmented approach maintains manufacturing efficiency through specialized processes while enabling full process optimization for each substrate type.
Data Source
AI summary
A display device is disclosed that includes a first single crystal semiconductor substrate comprising a plurality of first transistors, a second single crystal semiconductor substrate disposed on the first single crystal semiconductor substrate and comprising a plurality of second transistors, a light emitting element layer disposed on the second single crystal semiconductor substrate and comprising a plurality of light emitting elements. In a plan view, an area of the first single crystal semiconductor substrate is smaller than an area of the second single crystal semiconductor substrate. A minimum line width of one of the first transistors is smaller than a minimum line width of one of the second transistors.