Stacked Semiconductor Structure With Thermal Bonding Layer
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Solution Overview
Problem
The scaling down of MOSFETs in semiconductor devices leads to deterioration of operation characteristics due to increased heat generation and reduced thermal conductivity, necessitating improved heat dissipation and reliability in highly integrated semiconductor devices.
Innovation Solution
A semiconductor device design featuring a transistor layer with a bonding layer having higher thermal conductivity than silicon oxide, an upper substrate with lower dopant concentration, and a lower wiring layer connected by conductive lines, facilitating heat dissipation and enhancing reliability through the use of a metal-doped insulating material and intrinsic semiconductor substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFETs are scaled down to increase integration, then device density is improved, but heat dissipation deteriorates
Solution Approach 1:
The semiconductor device is divided into multiple layers including a first substrate, transistor layer, bonding layer, and second substrate. This segmentation allows heat to be dissipated through multiple pathways and surfaces, reducing the thermal burden on any single component while maintaining high device integration density.
Solution Approach 2:
A bonding layer with higher thermal conductivity than silicon oxide is introduced as an intermediary between the transistor layer and the second substrate. This bonding layer acts as a thermal mediator that efficiently conducts heat away from the transistor layer to the second substrate, solving the heat dissipation problem while preserving the benefits of scaled-down MOSFETs.
2Productivity
If MOSFETs are scaled down to increase integration, then device density is improved, but thermal conductivity deteriorates
Solution Approach 1:
The thermal conductivity parameter is improved by selecting a bonding layer material with higher thermal conductivity than silicon oxide. This parameter change in the bonding layer compensates for the thermal conductivity deterioration that occurs when MOSFETs are scaled down, thereby maintaining reliability while achieving high integration density.
Solution Approach 2:
The device structure combines multiple materials with different properties: a semiconductor substrate, a transistor layer, a bonding layer with high thermal conductivity, and a second substrate. This composite material approach allows optimization of both integration density and thermal conductivity by selecting materials that excel in their respective functions.
3Ease of manufacture
If silicon oxide is used as the bonding layer, then manufacturing is simplified, but heat dissipation is insufficient
Solution Approach 1:
The thermal conductivity parameter of the bonding layer is changed from that of silicon oxide to a higher value material. This parameter change prioritizes heat dissipation performance over manufacturing simplicity, as the bonding layer can still be formed using standard deposition techniques while achieving superior thermal management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively dissipates heat generated from the transistor layer, upper, and lower wiring layers, improving the reliability and performance of highly integrated semiconductor devices.
Implementation Method 1
a bonding layer between the upper wiring layer and the upper substrate... a material having higher thermal conductivity than silicon oxide
Data Source
AI summary
A semiconductor device includes a transistor layer including a semiconductor substrate and gate structures on an upper surface of the semiconductor substrate, an upper substrate on the transistor layer, an upper wiring layer disposed between the transistor layer and the upper substrate and including upper conductive lines, a bonding layer between the upper wiring layer and the upper substrate, and a lower wiring layer disposed on a lower surface of the semiconductor substrate and including lower conductive lines. The transistor layer is disposed between the lower wiring layer and the upper wiring layer. The bonding layer includes a material having higher thermal conductivity than silicon oxide, and a dopant concentration of the upper substrate is lower than a dopant concentration of the semiconductor substrate.


