Stacked Semiconductor Package Through-Electrode Segmentation
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in efficiently connecting and enabling multiple semiconductor chips stacked using through-electrodes, particularly in achieving reliable signal transmission and data input/output operations across chip boundaries.
Innovation Solution
A stacked semiconductor package design incorporating through-electrodes, spacers with embedded inverter chips, and multi-layered wiring patterns that connect electrodes across chips, enabling signal inversion and data transmission between semiconductor chips, and utilizing conductive connection members like bumps and anisotropic conductive films for efficient electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through-electrodes are used to connect stacked semiconductor chips, then electrical connection between chips is achieved, but signal transmission reliability and chip selection capability deteriorate
Solution Approach 1:
The through-electrodes are segmented into multiple sections with different connection configurations. First through-electrodes connect only between adjacent chips (first and second chips), while second through-electrodes connect through multiple chips (first, second, and third chips). This segmentation allows independent control and selection of different chip combinations, improving both signal reliability and chip selection capability simultaneously.
2Productivity
If multiple through-electrodes are implemented for data input/output, then data transmission capability is improved, but device complexity increases
Solution Approach 1:
The through-electrodes are designed with multi-functionality to reduce overall device complexity. The same through-electrode structure serves multiple purposes: providing electrical connection, enabling chip selection through enable signals, and supporting data input/output operations. This universal design approach allows efficient data transmission while avoiding the need for separate dedicated structures for each function.
Data Source
AI summary
A stacked semiconductor package includes first and second semiconductor chips including semiconductor chip bodies which have circuit units, first through-electrodes which pass through the semiconductor chip bodies at first positions, and second through-electrodes which pass through the semiconductor chip bodies at second positions and provide a chip enable signal to the circuit units. A spacer including a spacer body may be interposed between the first semiconductor chip and the second semiconductor chip, with an inverter chip embedded in the spacer body. Wiring patterns formed on the spacer body may connect the first through-electrodes of the first semiconductor chip with the second through-electrodes of the second semiconductor chip, the first through-electrodes of the first semiconductor chip with input terminals of the inverter chip, and output terminals of the inverter chip with the second through-electrodes of the first semiconductor chip.