Stacked Semiconductor Device With Through-Electrodes and Low-Temperature Insulation
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Solution Overview
Problem
Conventional techniques lack effective methods for forming through-holes in semiconductor substrates at low temperatures and insulating them, which is necessary for reducing the thickness of silicon substrates to facilitate the formation of through-electrodes in three-dimensional stacked semiconductor devices, and they do not provide for back wiring, limiting the device's flexibility and integration density.
Innovation Solution
A packaged stacked semiconductor device with through-electrodes that uses a thin silicon substrate sandwiched by upper and lower insulating layers, allowing for back wiring and low-cost formation of through-electrodes, where the insulating layers provide rigidity and the through-electrodes are connected to a multi-layer wiring section, enabling additional wiring on the back surface at low temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional high-temperature processes are used to form thermally oxidized films or CVD insulation on through-hole walls, then insulation of through-holes is achieved, but the process cannot be applied to semiconductor device mounting which requires low-temperature treatment
Solution Approach 1:
The patent changes the formation temperature parameter from conventional high-temperature (thermal oxidation or CVD) to low-temperature (80-150°C) by using a novel insulating film formation method that deposits insulation material without requiring high heat, enabling compatibility with semiconductor device mounting processes
Solution Approach 2:
The patent replaces the thermal field-based insulation method (thermal oxidation or CVD requiring high temperature) with a deposition-based method that forms insulating films at low temperature, substituting the thermal mechanism with a mechanical/chemical deposition process
2Length of stationary object
If a thin silicon substrate is used to facilitate formation of through-electrodes, then the thickness is reduced for easier through-hole formation, but the rigidity of the structure is insufficient
Solution Approach 1:
The patent creates a composite structure combining thin silicon substrate with insulating films (such as spin-on-glass or benzocyclobutene) and resin layers, where the combination provides both the thinness needed for through-electrode formation and the rigidity required for structural stability
Solution Approach 2:
The patent embeds insulating films and resin layers within and around the thin silicon substrate structure, creating a nested configuration where the insulating materials are positioned between and around the substrate to provide structural support without adding significant thickness
3Area of stationary object
If conventional packaging structures are used, then package size is maintained, but the degree of freedom in three-dimensional stacking and combination is limited
Solution Approach 1:
The patent transitions from conventional two-dimensional planar packaging to three-dimensional stacked configuration by forming through-electrodes that penetrate the substrate and enabling vertical stacking of multiple semiconductor devices, thereby utilizing the third dimension for increased integration density
Solution Approach 2:
The patent divides the semiconductor system into multiple separate devices or layers that can be independently manufactured and then stacked vertically through through-electrode connections, allowing flexible combination and arrangement in three-dimensional space
Data Source
AI summary
The present invention provides a packaged stacked semiconductor device which includes bumps serving as external electrode terminals, the bumps being provided on both a front surface and a back surface of the device, and which is sacked on another semiconductor device, substrate, or board having electrode terminals so that the bumps are directly and electrically connected to the electrode terminals. The semiconductor device includes a semiconductor substrate having through-electrodes formed therein. The semiconductor device has, on the front surface side of the semiconductor substrate, a wiring layer connected to the through-electrodes, an insulating film formed on the wiring layer, additional wiring formed on the insulating film, post electrodes connected to the wiring, and external connection bumps connected to the post electrodes. The semiconductor device has, on the back surface side of the semiconductor substrate, an insulating film formed so as to cover the back surface of the semiconductor substrate, exclusive of tip end portions of the through-electrodes, wiring which is formed on the insulating film and to which the through-electrodes are connected, and external connection bumps connected to the wiring.