3D Stacked Semiconductor Tiers via Sacrificial Layer Transfer
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Solution Overview
Problem
Conventional semiconductor device shrinkage techniques face physical limitations, necessitating innovative methods for high-quality 3D device stacking to enhance performance and density.
Innovation Solution
A 3D device stacking method involving the formation of a second single-crystalline semiconductor tier over a first tier using sacrificial structures, where the lattice information is transferred from the first to the second tier, enabling reliable and high-quality single-crystalline semiconductor layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional linear shrinkage is used to increase device density, then device density improves, but physical and lithography limitations are reached
Solution Approach 1:
The patent transitions from conventional linear (2D) device shrinkage to three-dimensional stacking, arranging multiple semiconductor devices vertically in stacked configurations. This dimensional change allows continued increase in device density without further lateral shrinkage, overcoming lithography and physical limitations while maintaining device performance and reliability
2Quantity of substance
If 3D device stacking is implemented to overcome shrinkage limitations, then device density improves, but manufacturing complexity increases
Solution Approach 1:
The patent divides the semiconductor structure into multiple discrete tiers or stacks, with each tier containing individual devices that can be independently formed and controlled. This segmentation allows complex 3D stacking to be broken down into manageable units, reducing overall manufacturing complexity while achieving high device density
Solution Approach 2:
The patent introduces sacrificial structures as intermediary elements during the formation process. These sacrificial structures facilitate the creation of complex stacked configurations by providing temporary support and defining spatial relationships, which are then removed to achieve the final stacked structure, thereby simplifying the manufacturing process
3Manufacturing precision
If sacrificial structures are used to form second semiconductor tier, then single-crystalline quality improves, but manufacturing steps increase
Solution Approach 1:
The patent performs preliminary formation of sacrificial structures before depositing the second single-crystalline semiconductor layer. This preliminary action prepares the substrate in advance, ensuring proper lattice matching and crystal orientation are established before the critical semiconductor layer deposition, thereby improving crystal quality while organizing the manufacturing process into logical sequences
4Manufacturing precision
If lattice information is transferred from first to second semiconductor structure, then crystal quality improves, but process precision requirements increase
Solution Approach 1:
The patent uses sacrificial structures as intermediaries to transfer lattice information from the first semiconductor structure to the second. These sacrificial structures act as a bridge, maintaining lattice continuity and crystal orientation across the interface between tiers. By controlling the epitaxial growth on the sacrificial structures, precise lattice matching is achieved, ensuring high crystal quality in the second semiconductor layer
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures the formation of high-quality single-crystalline semiconductor tiers, facilitating improved device performance and density in stacked integrated circuits, such as memory cell arrays with reduced lattice defects.
Implementation Method 1
A second semiconductor structure of the first crystalline semiconductor material is formed over the sacrificial structures and over the first structures, wherein lattice information may be transferred from the first to the second semiconductor structure
Data Source
AI summary
An integrated circuit with stacked devices. One embodiment provides a surface of a first semiconductor structure of a first crystalline semiconductor material including first and second portions. First structures are formed on the first portions. The second portions remain uncovered. Sacrificial structures of a second, different crystalline material are formed on the second portions. A second semiconductor structure of the first crystalline semiconductor material is formed over the sacrificial structures and over the first structures.