Stacked Semiconductor Via Testing with Optical Signals

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Solution Overview

Problem

Existing semiconductor integrated circuit via tests have low reliability due to environmental and internal factors, and are further compromised by the presence of circuit blocks that can block or alter electric current, making accurate signal transfer challenging.

Innovation Solution

A semiconductor integrated circuit design that includes a plurality of stacked slices with vias for vertical signal transfer, featuring a control signal generator and test blocks that enable pulse or current signals to be sent through the vias during a test section, even when a circuit block is present between them, using a signal path formed by tri-state inverters to ensure reliable testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If electric current measurement method is used for via test, then the test can be performed on each slice, but the reliability of the test is low due to environmental factors and circuit blocks blocking or altering the current

Engineering Contradiction:
Improvevia test reliabilityVSAvoidenvironmental factors and circuit blocks affecting current measurement
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent replaces the electrical current measurement system with an optical signal transmission system. Instead of measuring electric current through transistors and monitor pads, the invention uses optical signals (light) to traverse the via paths. This substitution eliminates the harmful effects of environmental factors and circuit blocks that interfere with electrical current, as optical signals are not affected by electrical circuitry in the same way. The optical method provides a clean, isolated test path that directly measures via integrity without interference from surrounding circuit blocks or environmental electrical noise.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If circuit blocks are placed between TSVs for slice identification, then slices can be distinguished, but the via test becomes undesirable since electric current may be blocked or greatly changed

Engineering Contradiction:
Improveslice identification capabilityVSAvoidvia test accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an optical signal as an intermediary medium to perform via testing without being affected by circuit blocks. The optical signal acts as a mediator that can pass through or around the circuit blocks placed between TSVs, allowing the test to proceed without direct electrical interaction with the slice identification circuitry. This intermediary approach enables simultaneous maintenance of slice identification functionality and via test accuracy, as the optical test path is independent of the electrical circuit blocks.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If electric current is used for via test, then signal transfer between slices can be tested, but the measurement is inaccurate due to current changes from internal and external environmental factors

Engineering Contradiction:
Improvevia test measurement accuracyVSAvoidinternal and external environmental factors causing current variation
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent substitutes electrical current measurement with optical signal transmission to achieve precise via testing. Optical signals are inherently more stable and less susceptible to environmental variations compared to electrical currents. The optical method eliminates interference from internal factors such as transistor characteristics and external factors such as electrical noise, providing a stable and accurate measurement of via integrity and signal transfer capability between slices.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8704225B2Semiconductor integrated circuit
Publication Date: 2014.04.22 SK HYNIX INC
  • US8704225B2 patent drawing
  • US8704225B2 patent drawing
  • US8704225B2 patent drawing

AI summary

A semiconductor integrated circuit includes a plurality of stacked slices each configured to have a plurality of vias formed therein so that signals are transferred between the slices arranged in a vertical direction, wherein each of the plurality of slices is configured to transfer a pulse signal, generated during a test section, to a lowest slice of the plurality of slices through the vias connected thereto.