Stacked Semiconductor Device Voltage Drop Control via TSV Feedback
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Solution Overview
Problem
In semiconductor devices with stacked memory chips using through silicon vias (TSVs), the top chip experiences the lowest power supply voltage due to voltage drop, potentially leading to erroneous operations or shutdowns, and existing solutions like peak current control or controller-mediated current management are either inefficient or complex.
Innovation Solution
The semiconductor device includes a voltage detector and current source that monitor the voltage ZVCC and switch to a low current mode when it drops below a threshold, limiting current consumption during high consumption phases to prevent voltage drops and ensure reliable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory chips are stacked using TSVs to increase storage capacity, then the storage density is improved, but the power supply voltage at the top chip decreases due to voltage drop
Solution Approach 1:
The patent implements a feedback mechanism where the voltage at the top chip is continuously monitored and this voltage information is used to control the current consumption of lower chips. When voltage drops are detected, the system automatically reduces current consumption to maintain stable operation, resolving the contradiction between high-density stacking and operational reliability.
Solution Approach 2:
The system dynamically changes the current consumption parameter of memory chips based on the detected voltage conditions. By adjusting current consumption levels according to real-time voltage measurements, the system maintains reliable operation across all chips in the stack despite the inherent voltage drop in multi-chip configurations.
2Reliability
If peak current control is implemented to manage voltage drop, then the voltage stability is improved, but the device complexity increases due to controller management requirements
Solution Approach 1:
The patent enables memory chips to autonomously monitor their own voltage conditions and adjust their current consumption accordingly, without requiring external controller intervention. This self-service approach maintains voltage stability while eliminating the complexity of controller-mediated current management, as each chip independently regulates its own operation based on real-time voltage feedback.
3Reliability
If current consumption is limited to prevent voltage drop, then the voltage stability is improved, but the operation speed decreases due to reduced current availability
Solution Approach 1:
The system dynamically adjusts current consumption levels based on real-time voltage conditions rather than using fixed current limits. When voltage is stable, higher current levels are permitted for faster operation; when voltage drops are detected, current consumption is reduced to maintain stability. This dynamic adaptation resolves the contradiction between speed and voltage stability by allowing both high performance and reliable operation under different conditions.
Data Source
AI summary
According to one embodiment, a semiconductor device includes: a first semiconductor chip including a first via and a second via; and a second semiconductor chip including a third via and a fourth via and being located above the first semiconductor chip. The first semiconductor chip includes: a first detector capable of coupling to the third via through the second and fourth vias; and a first current source configured to control an output current in accordance with a voltage of the third via detected by the first detector.