Stacked Semiconductor Device Warpage Reduction via Chip Thickness
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Solution Overview
Problem
The reliability of inter-board connection terminals in stacked-type semiconductor devices is compromised due to warpage differences between semiconductor chips and wiring boards, leading to reduced connection life and mechanical reliability, especially when external and inter-board connection terminals have different arrangements and are subject to varying thermal expansion coefficients.
Innovation Solution
A stacked-type semiconductor device configuration where the second semiconductor chip is thicker than the first, reducing warpage differences and applying less load on inter-board connection terminals, thereby extending their connection life and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the second semiconductor chip is made thicker to reduce warpage differences, then the connection life and reliability of inter-board connection terminals improve, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent changes the thickness parameter of the second semiconductor chip to be greater than that of the first semiconductor chip. This parameter modification directly addresses the warpage difference issue, reducing thermal expansion mismatch and thereby improving the connection life and reliability of inter-board connection terminals without requiring complex structural modifications.
2Force
If different thicknesses of semiconductor chips are used to minimize warpage, then the load on inter-board connection terminals is reduced, but the manufacturing precision requirements increase
Solution Approach 1:
The patent modifies the thickness parameter of semiconductor chips to create a compensatory effect against warpage. By making the second semiconductor chip thicker than the first, the design compensates for thermal expansion differences, thereby reducing the load on inter-board connection terminals during thermal cycling.
3Reliability
If semiconductor chips of different thicknesses are stacked to reduce warpage, then the mechanical reliability improves, but the ease of manufacture decreases
Solution Approach 1:
The patent employs a parameter change approach by specifying that the second semiconductor chip has a greater thickness than the first semiconductor chip. This simple dimensional modification addresses warpage issues and improves mechanical reliability while maintaining relative manufacturing simplicity, as it only requires controlling chip thickness rather than redesigning the entire stacking structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The thicker second semiconductor chip reduces warpage-induced stress on inter-board connection terminals, leading to increased connection life and enhanced mechanical reliability by minimizing load on these terminals.
Implementation Method 1
due to a difference in the linear expansion coefficient between the semiconductor chip and the wiring board, warpage is caused by heat during use
Data Source
AI summary
In a stacked-type semiconductor device, a first semiconductor device and at least one second semiconductor device are stacked. The first semiconductor device includes a wiring board and a first semiconductor chip mounted on the wiring board. The second semiconductor device includes a wiring board and a second semiconductor chip mounted on the wiring board. The thickness of the second semiconductor chip of each second semiconductor device is thicker than the thickness of the first semiconductor chip.