Stacked Semiconductor Structure Eliminating Wire Bonding

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Solution Overview

Problem

The existing semiconductor package structures face challenges in achieving high integration and miniaturization while maintaining cost-effectiveness, particularly due to issues with wire bonding and the use of expensive through-silicon vias (TSVs).

Innovation Solution

A stacked semiconductor structure is designed with a substrate, electronic components, fillets, and redistribution layers that electrically connect pads without wires, reducing the size and manufacturing cost by eliminating the need for wire bonding and TSVs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire bonding is used to electrically connect pads, then electrical connectivity is achieved, but device size increases and manufacturing complexity increases

Engineering Contradiction:
Improveelectrical connectivityVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent extracts and eliminates the wire bonding process from the semiconductor package structure. Instead of using separate wires to connect pads, the invention integrates electrical connectivity directly into the substrate through redistribution layers and conductive structures, removing the need for external wire bonds and thereby reducing device size and manufacturing complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the functions of electrical connection and substrate structure into a single integrated system. The redistribution layers and conductive structures are combined with the substrate to provide both mechanical support and electrical connectivity, eliminating the need for separate wire bonding components

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If through-silicon vias (TSVs) are used to achieve high integration, then electrical connectivity and integration are improved, but manufacturing cost increases

Engineering Contradiction:
Improveintegration capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by implementing redistribution layers and conductive structures only in specific regions where electrical connectivity is needed, rather than using expensive TSVs throughout the entire substrate. This localized approach achieves high integration capability in critical areas while avoiding the high manufacturing costs associated with comprehensive TSV implementation

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent replaces expensive TSV structures with more cost-effective redistribution layers and conductive structures that can be manufactured using standard semiconductor fabrication processes. These alternative structures achieve the required integration capability at lower manufacturing cost

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If wire bonding is used for electrical connection, then connectivity is established, but manufacturing complexity and time increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidmanufacturing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements preliminary action by pre-integrating redistribution layers and conductive structures into the substrate during the semiconductor fabrication process, before the final assembly stage. This eliminates the need for subsequent wire bonding operations, thereby increasing manufacturing speed and productivity while maintaining reliable electrical connectivity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10373932B2Stacked semiconductor structure
Publication Date: 2019.08.06 NAN YA TECH
  • US10373932B2 patent drawing
  • US10373932B2 patent drawing
  • US10373932B2 patent drawing

AI summary

A stacked semiconductor structure is provided. The stacked semiconductor structure includes a substrate, a first electronic component, a first fillet, and a first redistribution layer. The substrate has a support surface. The substrate includes a first pad disposed on the support surface. The first electronic component is disposed on the support surface and has a first bottom surface, a first top surface, and a first side surface connecting the first bottom surface and the first top surface. The first electronic component includes a second pad disposed on the first top surface. The first fillet is disposed on the support surface and the first side surface and has a first inclined surface. The first redistribution layer is disposed on the support surface, the first top surface, and the first inclined surface and electrically connecting the first pad to the second pad.