Stacked Image Sensor Air-Gap Insulation for Logic Heat Isolation
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Solution Overview
Problem
In image sensors with stacked chip architecture, the heat generated by the logic chip can cause increased dark current and Dark Image Non-Uniformity (DINU), especially in hot operating environments, due to heat dissipation to neighboring pixel chips, leading to undesirable noise even in low light conditions.
Innovation Solution
The implementation of a stacked chip architecture with fluidly connected air gaps between the logic and pixel dies, utilizing raised oxide features to create thermal insulation, reducing heat transfer through both conduction and convection, and optimizing the bond structure to minimize thermal conduction paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If stacked chip architecture is used to consolidate size and shorten circuit connections, then device integration and compactness are improved, but heat dissipation to neighboring chips increases causing dark current and DINU
Solution Approach 1:
The patent divides the interface between logic and pixel dies into multiple discrete bonding regions separated by air gaps. This segmentation creates thermal isolation zones that prevent heat conduction from the logic chip to the pixel chip, while still maintaining electrical connectivity through the bonded regions.
Solution Approach 2:
The patent introduces air gaps as intermediary spaces between the logic and pixel dies. These air gaps act as thermal insulators that mediate the thermal interaction between the two chips, blocking heat transfer while allowing the stacked architecture to maintain its compact form factor.
2Device complexity
If logic chip is placed directly on pixel chip to minimize spacing, then device complexity is reduced, but thermal conduction paths increase causing dark current increase
Solution Approach 1:
The patent applies different properties to different regions of the chip interface: bonded regions provide electrical connectivity while air gap regions provide thermal insulation. This local differentiation allows the system to simultaneously achieve electrical functionality and thermal isolation without increasing overall device complexity.
Solution Approach 2:
The patent utilizes air gaps (porous space) between the logic and pixel dies to create thermal insulation. The porous structure of air-filled spaces provides effective thermal blocking while maintaining a simple bonding structure, preventing dark current generation without complicating the device architecture.
3Ease of manufacture
If conventional bonding is used between logic and pixel dies, then manufacturing process is simplified, but heat transfer through conduction and convection increases causing noise
Solution Approach 1:
The bonding process is segmented to create both bonded regions and air gap regions in a controlled manner. This segmentation can be achieved through standard semiconductor fabrication techniques such as selective bonding or etching, maintaining ease of manufacture while introducing thermal insulation through the air gaps.
Solution Approach 2:
The patent changes the physical parameters of the interface between logic and pixel dies by introducing air gaps with specific dimensions and distributions. These parameter changes (gap size, location, and pattern) optimize thermal insulation while maintaining compatibility with conventional manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces heat transfer between the logic and pixel dies, resulting in a 70% reduction in Dark Image Non-Uniformity, improving image sensor performance by minimizing dark current and noise, especially in high-temperature applications.
Implementation Method 1
an air gap between a logic die and a pixel die... significantly reduces heat transfer from the logic die to the pixel die
Implementation Method 2
reducing heat transfer through both conduction and convection
Data Source
AI summary
Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.