Stacked Image Sensor Bonding Structure With Fewer Conductive Layers

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Solution Overview

Problem

Stacked CMOS image sensors face increased resistivity and fabrication costs due to multiple conductive bonding layers in bond structures, which also reduce device density and increase design complexity.

Innovation Solution

Implementing a stacked CMOS image sensor design with reduced conductive bonding layers, specifically using a single layer of conductive bonding pads and contacts, and through-substrate vias to decrease the number of conductive structures and enhance electrical coupling between chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple conductive bonding layers are used in bond structures, then electrical connection reliability is improved, but resistivity increases and device density decreases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoiddevice density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent transitions from planar bonding to three-dimensional bonding by forming bond structures that extend vertically through the substrate. Through-substrate vias create direct vertical electrical pathways, eliminating the need for multiple lateral conductive bonding layers. This dimensional change reduces the number of conductive layers from multiple horizontal layers to a single vertical pathway, thereby reducing resistivity while maintaining connection reliability and increasing device density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple conductive bonding layers are used in bond structures, then electrical connection reliability is improved, but fabrication cost increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts and eliminates unnecessary conductive bonding layers from the bond structure, retaining only the essential through-substrate via and single conductive bonding layer. By removing redundant conductive layers, the fabrication process is simplified, reducing the number of deposition and patterning steps required. This extraction of excess components directly reduces fabrication cost while preserving the essential electrical connection function.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If multiple conductive bonding layers are used in bond structures, then electrical connection reliability is improved, but RC delay increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidRC delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent reduces RC delay by transitioning to vertical through-substrate via bonding, which shortens the current path length compared to multiple lateral conductive bonding layers. The direct vertical pathway minimizes resistance, and the reduced number of interfaces decreases capacitance. This dimensional reconfiguration of the bond structure directly reduces the RC time constant, improving signal transmission speed while maintaining connection reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If multiple conductive bonding layers are used in bond structures, then electrical connection reliability is improved, but design complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoiddesign complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent simplifies the bond structure design by extracting and removing multiple conductive bonding layers, retaining only the essential through-substrate via and single conductive bonding layer. This reduction in structural complexity directly decreases design complexity, as fewer layers mean fewer patterning steps, alignment requirements, and process parameters to control. The simplified structure maintains electrical connection reliability while being significantly easier to design and manufacture.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20240079434A1Bonding structures for stacked image sensor
Publication Date: 2024.03.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240079434A1 patent drawing
  • US20240079434A1 patent drawing
  • US20240079434A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures. At least one of the first bond structure and the second bond structure comprises one or less conductive bonding layer.